linux-kernel - [tip:x86/cpu] x86/cpufeatures: Add FDP_EXCPTN_ONLY and ZERO_FCS

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Message-ID: <tip-cbb99c0f588737ec98c333558922ce47e9a95827@git.kernel.org>
Date:   Fri, 14 Jun 2019 04:01:10 -0700
From:   tip-bot for Aaron Lewis <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     frederic@...nel.org, mingo@...hat.com, bp@...e.de,
        jmattson@...gle.com, mingo@...nel.org, konrad.wilk@...cle.com,
        x86@...nel.org, linux-kernel@...r.kernel.org,
        Thomas.Lendacky@....com, pfeiner@...gle.com, tglx@...utronix.de,
        hpa@...or.com, aaronlewis@...gle.com, robert.hu@...ux.intel.com,
        fenghua.yu@...el.com
Subject: [tip:x86/cpu] x86/cpufeatures: Add FDP_EXCPTN_ONLY and ZERO_FCS_FDS

Commit-ID:  cbb99c0f588737ec98c333558922ce47e9a95827
Gitweb:     https://git.kernel.org/tip/cbb99c0f588737ec98c333558922ce47e9a95827
Author:     Aaron Lewis <aaronlewis@...gle.com>
AuthorDate: Wed, 5 Jun 2019 15:02:52 -0700
Committer:  Borislav Petkov <bp@...e.de>
CommitDate: Fri, 14 Jun 2019 12:26:22 +0200

x86/cpufeatures: Add FDP_EXCPTN_ONLY and ZERO_FCS_FDS

Add the CPUID enumeration for Intel's de-feature bits to accommodate
passing these de-features through to kvm guests.

These de-features are (from SDM vol 1, section 8.1.8):
 - X86_FEATURE_FDP_EXCPTN_ONLY: If CPUID.(EAX=07H,ECX=0H):EBX[bit 6] = 1, the
   data pointer (FDP) is updated only for the x87 non-control instructions that
   incur unmasked x87 exceptions.
 - X86_FEATURE_ZERO_FCS_FDS: If CPUID.(EAX=07H,ECX=0H):EBX[bit 13] = 1, the
   processor deprecates FCS and FDS; it saves each as 0000H.

Signed-off-by: Aaron Lewis <aaronlewis@...gle.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Jim Mattson <jmattson@...gle.com>
Cc: Fenghua Yu <fenghua.yu@...el.com>
Cc: Frederic Weisbecker <frederic@...nel.org>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
Cc: marcorr@...gle.com
Cc: Peter Feiner <pfeiner@...gle.com>
Cc: pshier@...gle.com
Cc: Robert Hoo <robert.hu@...ux.intel.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Thomas Lendacky <Thomas.Lendacky@....com>
Cc: x86-ml <x86@...nel.org>
Link: https://lkml.kernel.org/r/20190605220252.103406-1-aaronlewis@google.com
---
 arch/x86/include/asm/cpufeatures.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 75f27ee2c263..1017b9c7dfe0 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -239,12 +239,14 @@
 #define X86_FEATURE_BMI1		( 9*32+ 3) /* 1st group bit manipulation extensions */
 #define X86_FEATURE_HLE			( 9*32+ 4) /* Hardware Lock Elision */
 #define X86_FEATURE_AVX2		( 9*32+ 5) /* AVX2 instructions */
+#define X86_FEATURE_FDP_EXCPTN_ONLY	( 9*32+ 6) /* "" FPU data pointer updated only on x87 exceptions */
 #define X86_FEATURE_SMEP		( 9*32+ 7) /* Supervisor Mode Execution Protection */
 #define X86_FEATURE_BMI2		( 9*32+ 8) /* 2nd group bit manipulation extensions */
 #define X86_FEATURE_ERMS		( 9*32+ 9) /* Enhanced REP MOVSB/STOSB instructions */
 #define X86_FEATURE_INVPCID		( 9*32+10) /* Invalidate Processor Context ID */
 #define X86_FEATURE_RTM			( 9*32+11) /* Restricted Transactional Memory */
 #define X86_FEATURE_CQM			( 9*32+12) /* Cache QoS Monitoring */
+#define X86_FEATURE_ZERO_FCS_FDS	( 9*32+13) /* "" Zero out FPU CS and FPU DS */
 #define X86_FEATURE_MPX			( 9*32+14) /* Memory Protection Extension */
 #define X86_FEATURE_RDT_A		( 9*32+15) /* Resource Director Technology Allocation */
 #define X86_FEATURE_AVX512F		( 9*32+16) /* AVX-512 Foundation */