linux-kernel - RE: [PATCHv5 18/20] PCI: mobiveil: Disable IB and OB windows set by bootloader

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Date:   Mon, 17 Jun 2019 10:42:36 +0000
From:   "Z.q. Hou" <zhiqiang.hou@....com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>
CC:     "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "l.subrahmanya@...iveil.co.in" <l.subrahmanya@...iveil.co.in>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Xiaowei Bao <xiaowei.bao@....com>
Subject: RE: [PATCHv5 18/20] PCI: mobiveil: Disable IB and OB windows set by
 bootloader

Hi Lorenzo,


> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Sent: 2019年6月17日 17:31
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: bhelgaas@...gle.com; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; robh+dt@...nel.org; mark.rutland@....com;
> l.subrahmanya@...iveil.co.in; shawnguo@...nel.org; Leo Li
> <leoyang.li@....com>; catalin.marinas@....com; will.deacon@....com;
> Mingkai Hu <mingkai.hu@....com>; M.h. Lian <minghuan.lian@....com>;
> Xiaowei Bao <xiaowei.bao@....com>
> Subject: Re: [PATCHv5 18/20] PCI: mobiveil: Disable IB and OB windows set
> by bootloader
> 
> On Sat, Jun 15, 2019 at 05:03:33AM +0000, Z.q. Hou wrote:
> > Hi Lorenzo,
> >
> > > -----Original Message-----
> > > From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@....com]
> > > Sent: 2019年6月13日 0:24
> > > To: Z.q. Hou <zhiqiang.hou@....com>; bhelgaas@...gle.com
> > > Cc: linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> > > devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> > > robh+dt@...nel.org; mark.rutland@....com;
> > > robh+l.subrahmanya@...iveil.co.in;
> > > shawnguo@...nel.org; Leo Li <leoyang.li@....com>;
> > > catalin.marinas@....com; will.deacon@....com; Mingkai Hu
> > > <mingkai.hu@....com>; M.h. Lian <minghuan.lian@....com>; Xiaowei
> Bao
> > > <xiaowei.bao@....com>
> > > Subject: Re: [PATCHv5 18/20] PCI: mobiveil: Disable IB and OB
> > > windows set by bootloader
> > >
> > > On Fri, Apr 12, 2019 at 08:37:00AM +0000, Z.q. Hou wrote:
> > > > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > > >
> > > > Disable all inbound and outbound windows before set up the windows
> > > > in kernel, in case transactions match the window set by bootloader.
> > >
> > > There must be no PCI transactions ongoing at bootloader<->OS handover.
> > >
> >
> > Yes, exact.
> >
> > > The bootloader needs fixing and this patch should be dropped, the
> > > host bridge driver assumes the host bridge state is disabled,
> >
> > The host bridge driver should not assumes the host state is disabled,
> > actually u-boot enable/initialize the host and without disabling it
> > when transfer the control to Linux.
> 
> Fix the bootloader and drop this patch, I explain to you why.

This patch is just to avoid uboot driver windows setup and Linux driver windows
setup overlap issue, please drop it if you don't think it's needed 😊.

Thanks,
Zhiqiang

> 
> > > it will program the bridge
> > > apertures from scratch with no ongoing transactions, anything
> > > deviating from this behaviour is a bootloader bug and a recipe for disaster.
> >
> > The point of this patch is not to fix the ongoing transaction issue,
> > it is to avoid a potential issue which is caused by the outbound
> > window enabled by bootloader overlapping with Linux enabled.
> 
> See above.
> 
> Lorenzo
> 
> > Thanks,
> > Zhiqiang
> >
> > > Lorenzo
> > >
> > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > > > Reviewed-by: Minghuan Lian <Minghuan.Lian@....com>
> > > > Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@...iveil.co.in>
> > > > ---
> > > > V5:
> > > >  - No functionality change.
> > > >
> > > >  drivers/pci/controller/pcie-mobiveil.c | 25
> > > > +++++++++++++++++++++++++
> > > >  1 file changed, 25 insertions(+)
> > > >
> > > > diff --git a/drivers/pci/controller/pcie-mobiveil.c
> > > > b/drivers/pci/controller/pcie-mobiveil.c
> > > > index 8dc87c7a600e..411e9779da12 100644
> > > > --- a/drivers/pci/controller/pcie-mobiveil.c
> > > > +++ b/drivers/pci/controller/pcie-mobiveil.c
> > > > @@ -565,6 +565,24 @@ static int mobiveil_bringup_link(struct
> > > mobiveil_pcie *pcie)
> > > >  	return -ETIMEDOUT;
> > > >  }
> > > >
> > > > +static void mobiveil_pcie_disable_ib_win(struct mobiveil_pcie
> > > > +*pcie, int idx) {
> > > > +	u32 val;
> > > > +
> > > > +	val = csr_readl(pcie, PAB_PEX_AMAP_CTRL(idx));
> > > > +	val &= ~(1 << AMAP_CTRL_EN_SHIFT);
> > > > +	csr_writel(pcie, val, PAB_PEX_AMAP_CTRL(idx)); }
> > > > +
> > > > +static void mobiveil_pcie_disable_ob_win(struct mobiveil_pcie
> > > > +*pcie, int idx) {
> > > > +	u32 val;
> > > > +
> > > > +	val = csr_readl(pcie, PAB_AXI_AMAP_CTRL(idx));
> > > > +	val &= ~(1 << WIN_ENABLE_SHIFT);
> > > > +	csr_writel(pcie, val, PAB_AXI_AMAP_CTRL(idx)); }
> > > > +
> > > >  static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)  {
> > > >  	phys_addr_t msg_addr = pcie->pcie_reg_base; @@ -585,6 +603,13
> @@
> > > > static int mobiveil_host_init(struct mobiveil_pcie *pcie)  {
> > > >  	u32 value, pab_ctrl, type;
> > > >  	struct resource_entry *win;
> > > > +	int i;
> > > > +
> > > > +	/* Disable all inbound/outbound windows */
> > > > +	for (i = 0; i < pcie->apio_wins; i++)
> > > > +		mobiveil_pcie_disable_ob_win(pcie, i);
> > > > +	for (i = 0; i < pcie->ppio_wins; i++)
> > > > +		mobiveil_pcie_disable_ib_win(pcie, i);
> > > >
> > > >  	/* setup bus numbers */
> > > >  	value = csr_readl(pcie, PCI_PRIMARY_BUS);
> > > > --
> > > > 2.17.1
> > > >