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Message-ID: <alpine.DEB.2.21.1906180741440.1963@nanos.tec.linutronix.de>
Date: Tue, 18 Jun 2019 07:43:48 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Fenghua Yu <fenghua.yu@...el.com>
cc: Andy Lutomirski <luto@...nel.org>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, H Peter Anvin <hpa@...or.com>,
Ashok Raj <ashok.raj@...el.com>,
Tony Luck <tony.luck@...el.com>,
Ravi V Shankar <ravi.v.shankar@...el.com>,
linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: Re: [PATCH v4 2/5] x86/umwait: Initialize umwait control values
On Mon, 17 Jun 2019, Fenghua Yu wrote:
> On Tue, Jun 11, 2019 at 10:46:55PM +0200, Thomas Gleixner wrote:
> > On Sun, 9 Jun 2019, Fenghua Yu wrote:
> > > > Sounds good, but:
> > > >
> > > > > +#define MSR_IA32_UMWAIT_CONTROL_C02 BIT(0)
> > > >
> > > > > +static u32 umwait_control_cached = 100000;
> > > >
> > > > The code seems to disagree.
> > >
> > > The definition of bit[0] is: C0.2 is disabled when bit[0]=1. So
> > > 100000 means C0.2 is enabled (and max time is 100000).
> >
> > which is totally non obvious. If you have to encode the control bit, then
> > please make it explicit, i.e. mask out the disable bit in the initializer.
>
> Is this right?
>
> static u32 umwait_control_cached = 100000 & ~MSR_IA32_UMWAIT_CONTROL_C02_DISABLED;
Works, but looks pretty odd. I'd rather create an explicit initializer
macro, something like:
UMWAIT_CTRL_VAL(100000, UMWAIT_DISABLED);
Hmm?
Thanks,
tglx
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