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Message-ID: <DB3PR0402MB391691EEF083BA6BEF445235F5EA0@DB3PR0402MB3916.eurprd04.prod.outlook.com>
Date: Tue, 18 Jun 2019 08:24:59 +0000
From: Anson Huang <anson.huang@....com>
To: Shawn Guo <shawnguo@...nel.org>
CC: "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Leonard Crestez <leonard.crestez@....com>,
"viresh.kumar@...aro.org" <viresh.kumar@...aro.org>,
Abel Vesa <abel.vesa@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH] soc: imx: Add i.MX8MN SoC driver support
Hi, Shawn
> -----Original Message-----
> From: Shawn Guo <shawnguo@...nel.org>
> Sent: Tuesday, June 18, 2019 3:04 PM
> To: Anson Huang <anson.huang@....com>
> Cc: s.hauer@...gutronix.de; kernel@...gutronix.de; festevam@...il.com;
> Leonard Crestez <leonard.crestez@....com>; viresh.kumar@...aro.org;
> Abel Vesa <abel.vesa@....com>; linux-arm-kernel@...ts.infradead.org;
> linux-kernel@...r.kernel.org; dl-linux-imx <linux-imx@....com>
> Subject: Re: [PATCH] soc: imx: Add i.MX8MN SoC driver support
>
> On Tue, Jun 11, 2019 at 09:31:25AM +0800, Anson.Huang@....com wrote:
> > From: Anson Huang <Anson.Huang@....com>
> >
> > This patch adds i.MX8MN SoC driver support:
> >
> > root@...8mnevk:~# cat /sys/devices/soc0/family Freescale i.MX
> >
> > root@...8mnevk:~# cat /sys/devices/soc0/machine NXP i.MX8MNano
> DDR4
> > EVK board
> >
> > root@...8mnevk:~# cat /sys/devices/soc0/soc_id i.MX8MN
> >
> > root@...8mnevk:~# cat /sys/devices/soc0/revision
> > 1.0
> >
> > Signed-off-by: Anson Huang <Anson.Huang@....com>
> > ---
> > drivers/soc/imx/soc-imx8.c | 13 ++++++++++++-
> > 1 file changed, 12 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c
> > index 3842d09..02309a2 100644
> > --- a/drivers/soc/imx/soc-imx8.c
> > +++ b/drivers/soc/imx/soc-imx8.c
> > @@ -55,7 +55,12 @@ static u32 __init imx8mm_soc_revision(void)
> > void __iomem *anatop_base;
> > u32 rev;
> >
> > - np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
> > + if (of_machine_is_compatible("fsl,imx8mm"))
> > + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-
> anatop");
> > + else if (of_machine_is_compatible("fsl,imx8mn"))
> > + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-
> anatop");
>
> Can we have this anatop compatible in imx8_soc_data, so that we may save
> the call to of_machine_is_compatible()?
Do you mean adding a variable like " const char *anatop_compat " in imx8_soc_date structure,
then initialize it according to SoC type, and in imx8mm_soc_revision(), get to soc_data's anatio_compat to
find the anatop node? If yes, we have to add some code to get the soc_data in this function, or maybe
we can pass anatop compatible name as .soc_revision's parameter?
static const struct imx8_soc_data imx8mn_soc_data = {
.name = "i.MX8MN",
.soc_revision = imx8mm_soc_revision,
.anatop_compat = "fsl,imx8mn-anatop",
};
Anson.
>
> Shawn
>
> > + else
> > + np = NULL;
> > if (!np)
> > return 0;
> >
> > @@ -79,9 +84,15 @@ static const struct imx8_soc_data imx8mm_soc_data
> = {
> > .soc_revision = imx8mm_soc_revision, };
> >
> > +static const struct imx8_soc_data imx8mn_soc_data = {
> > + .name = "i.MX8MN",
> > + .soc_revision = imx8mm_soc_revision, };
> > +
> > static const struct of_device_id imx8_soc_match[] = {
> > { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
> > { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
> > + { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, },
> > { }
> > };
> >
> > --
> > 2.7.4
> >
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