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Message-ID: <20190618160105.26343-1-alpawi@amazon.com>
Date:   Tue, 18 Jun 2019 11:01:03 -0500
From:   <alpawi@...zon.com>
To:     unlisted-recipients:; (no To-header on input)
CC:     Benjamin Herrenschmidt <benh@...zon.com>,
        Patrick Williams <alpawi@...zon.com>,
        Jason Cooper <jason@...edaemon.net>,
        Andrew Lunn <andrew@...n.ch>,
        Gregory Clement <gregory.clement@...tlin.com>,
        "Sebastian Hesselbarth" <sebastian.hesselbarth@...il.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH 0/2] pinctl: armada-37xx: fix for pins 32+

From: Patrick Williams <alpawi@...zon.com>

The 37xx GPIO config registers are only 32 bits long and
span 2 registers for the NB GPIO controller.  The function
to calculate the offset was missing the increase to the
config register.

I have tested both raw gpio access and interrupts using
libgpiod utilities on an Espressonbin.

The first patch is a simple rename of a function because
the original name implied it was doing IO itself ("update
reg").  This patch could be dropped if undesired.

The second patch contains the fix for GPIOs 32+.

Patrick Williams (2):
  pinctrl: armada-37xx: rename reg-offset function
  pinctrl: armada-37xx: fix control of pins 32 and up

 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

-- 
2.17.2 (Apple Git-113)

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