lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Wed, 19 Jun 2019 10:09:04 +0200 From: Miquel Raynal <miquel.raynal@...tlin.com> To: masonccyang@...c.com.tw Cc: "Boris Brezillon" <boris.brezillon@...labora.com>, bbrezillon@...nel.org, broonie@...nel.org, christophe.kerello@...com, computersforpeace@...il.com, devicetree@...r.kernel.org, dwmw2@...radead.org, geert@...ux-m68k.org, juliensu@...c.com.tw, lee.jones@...aro.org, liang.yang@...ogic.com, linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org, linux-spi@...r.kernel.org, marcel.ziswiler@...adex.com, marek.vasut@...il.com, mark.rutland@....com, paul.burton@...s.com, richard@....at, robh+dt@...nel.org, stefan@...er.ch, zhengxunli@...c.com.tw Subject: Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller Hi Mason, masonccyang@...c.com.tw wrote on Wed, 19 Jun 2019 16:04:43 +0800: > Hi Boris, > > > > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller > > > > On Tue, 18 Jun 2019 08:14:36 +0200 > > Boris Brezillon <boris.brezillon@...labora.com> wrote: > > > > > > > > > > > > > > > > > > How to make all #CS keep high for NAND to enter > > > > > > > > low-power standby mode if driver don't use > "legacy.select_chip()" > > > > ? > > > > > > > > > > > > > > See commit 02b4a52604a4 ("mtd: rawnand: Make ->select_chip() > > > > optional > > > > > > > when ->exec_op() is implemented") which states: > > > > > > > > > > > > > > "When [->select_chip() is] not implemented, the core > is > > > > assuming > > > > > > > the CS line is automatically asserted/deasserted by the > driver > > > > > > > ->exec_op() implementation." > > > > > > > > > > > > > > Of course, the above is right only when the controller driver > > > > > supports > > > > > > > the ->exec_op() interface. > > > > > > > > > > > > Currently, it seems that we will get the incorrect data and > error > > > > > > operation due to CS in error toggling if CS line is controlled > in > > > > > > ->exec_op(). > > > > Oh, and please provide the modifications you added on top of this patch. > > Right now we're speculating on what you've done which is definitely not > > an efficient way to debug this sort of issues. > We really need to see the datasheet of the NAND chip which has a problem and how this LPM mode is advertized to understand what the chip expects and eventually how to work-around it. > The patch is to add in beginning of ->exec_op() to control CS# low and > before return from ->exec_op() to control CS# High. > i.e,. > static in mxic_nand_exec_op( ) > { > cs_to_low(); > > > > cs_to_high(); > return; > } > > But for nand_onfi_detect(), > it calls nand_read_param_page_op() and then nand_read_data_op(). > mxic_nand_exec_op() be called twice for nand_onfi_detect() Yes, this is expected and usually chips don't care. > and > driver will get incorrect ONFI parameter table data from > nand_read_data_op(). > Thanks, Miquèl
Powered by blists - more mailing lists