linux-kernel - RE: [PATCH net-next v6 2/5] net: stmmac: introducing support for DWC xPCS logics

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Date:   Thu, 20 Jun 2019 05:13:38 +0000
From:   "Ong, Boon Leong" <boon.leong.ong@...el.com>
To:     Jose Abreu <Jose.Abreu@...opsys.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        biao huang <biao.huang@...iatek.com>,
        Andrew Lunn <andrew@...n.ch>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Giuseppe Cavallaro" <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        "Kweh, Hock Leong" <hock.leong.kweh@...el.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "Voon, Weifeng" <weifeng.voon@...el.com>
Subject: RE: [PATCH net-next v6 2/5] net: stmmac: introducing support for
 DWC xPCS logics

>>From: Jose Abreu [mailto:Jose.Abreu@...opsys.com]
>>From: Florian Fainelli <f.fainelli@...il.com>
>>
>>> +Russell,
>>>
>>> On 6/4/2019 11:58 AM, Voon Weifeng wrote:
>>> > From: Ong Boon Leong <boon.leong.ong@...el.com>
>>> >
>>> > xPCS is DWC Ethernet Physical Coding Sublayer that may be integrated
>>> > into a GbE controller that uses DWC EQoS MAC controller. An example of
>>> > HW configuration is shown below:-
>>> >
>>> >   <-----------------GBE Controller---------->|<--External PHY chip-->
>>> >
>>> >   +----------+         +----+    +---+               +--------------+
>>> >   |   EQoS   | <-GMII->| DW |<-->|PHY| <-- SGMII --> | External GbE |
>>> >   |   MAC    |         |xPCS|    |IF |               | PHY Chip     |
>>> >   +----------+         +----+    +---+               +--------------+
>>> >          ^               ^                                  ^
>>> >          |               |                                  |
>>> >          +---------------------MDIO-------------------------+
>>> >
>>> > xPCS is a Clause-45 MDIO Manageable Device (MMD) and we need a way
>>to
>>> > differentiate it from external PHY chip that is discovered over MDIO.
>>> > Therefore, xpcs_phy_addr is introduced in stmmac platform data
>>> > (plat_stmmacenet_data) for differentiating xPCS from 'phy_addr' that
>>> > belongs to external PHY.
>>>
>>> Assuming this DW xPCS can be found with designs other than STMMAC
>>would
>>> not it make sense to model this as some kind of PHY/MDIO bridge? A
>>> little bit like what drivers/net/phy/xilinx_gmii2rgmii.c tries to do?
>>
>>Yes, DW XPCS is a separate IP that can be sold without the MAC.
>
>Hi Florian, thanks for pointing out the PHY driver for GMII to RGMII converter
>implementation. It seems like community would like dwxpcs to take the
>converter phy driver direction.
>
>We would like to check with community what is the MAC controller that is
>using above PHY driver so that we can dig deeper into the PHY & MAC driver
>architecture. We would like to map the existing usage of dwxpcs.c in 3/5 of
>this series is architecturally ready for PHY driver framework or new APIs
>would need to be defined.

Just to cycle-back to this track, we are working towards getting the ACPI device
ID for this IP. Meanwhile, since the C45 MDIO patych is also needed by 
Biao, we plan to line up the below patch for merge.

[PATCH net-next v6 1/5] net: stmmac: enable clause 45 mdio support

Is there any concern with this approach?