linux-kernel - RE: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <195bb56028d04001bbaf835cc17e032e@TWMBX02.aspeed.com>
Date:   Thu, 20 Jun 2019 08:01:58 +0000
From:   Ryan Chen <ryan_chen@...eedtech.com>
To:     Tao Ren <taoren@...com>,
        Brendan Higgins <brendanhiggins@...gle.com>
CC:     Mark Rutland <mark.rutland@....com>,
        devicetree <devicetree@...r.kernel.org>,
        "linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
        OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>
Subject: RE: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

Hello Tao,
	Let me more clear. When you set (3, 15, 14) the device sometimes response nack. 
	but when you set (4, 7, 7), the device always ack. Am I right? 
Ryan

-----Original Message-----
From: Tao Ren [mailto:taoren@...com] 
Sent: Thursday, June 20, 2019 3:57 PM
To: Ryan Chen <ryan_chen@...eedtech.com>; Brendan Higgins <brendanhiggins@...gle.com>
Cc: Mark Rutland <mark.rutland@....com>; devicetree <devicetree@...r.kernel.org>; linux-aspeed@...ts.ozlabs.org; OpenBMC Maillist <openbmc@...ts.ozlabs.org>; Linux Kernel Mailing List <linux-kernel@...r.kernel.org>; Rob Herring <robh+dt@...nel.org>; Linux ARM <linux-arm-kernel@...ts.infradead.org>; linux-i2c@...r.kernel.org
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

On 6/20/19 12:29 AM, Ryan Chen wrote:
> Hello Tao,
> 	Our recommend about clk divider setting is follow the datasheet clock setting table for clock divisor. 
> 
> Ryan  

Thanks Ryan for the response. Could you also share some recommendations/hints on how to solve the intermittent i2c transaction failures on Facebook AST2500 BMC platforms?

BTW, the patch is not aimed at modifying the existing formula of calculating clock settings in i2c-aspeed driver: people still get the recommended settings by default. The goal of the patch is to allow people to customize clock settings in case the default/recommended one doesn't work.


Cheers, 

Tao