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Date: Fri, 21 Jun 2019 11:21:38 +0200
From: Frederic Barrat <fbarrat@...ux.ibm.com>
To: "Oliver O'Halloran" <oohall@...il.com>,
Christoph Hellwig <hch@....de>
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Andrew Donnellan <ajd@...ux.ibm.com>
Subject: Re: [PATCH 2/4] powerpc/powernv: remove the unused tunneling exports
Le 21/06/2019 à 03:47, Oliver O'Halloran a écrit :
> On Thu, May 23, 2019 at 5:51 PM Christoph Hellwig <hch@....de> wrote:
>>
>> These have been unused ever since they've been added to the kernel.
>>
>> Signed-off-by: Christoph Hellwig <hch@....de>
>> ---
>> arch/powerpc/include/asm/pnv-pci.h | 4 --
>> arch/powerpc/platforms/powernv/pci-ioda.c | 4 +-
>> arch/powerpc/platforms/powernv/pci.c | 71 -----------------------
>> arch/powerpc/platforms/powernv/pci.h | 1 -
>> 4 files changed, 3 insertions(+), 77 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h
>> index 9fcb0bc462c6..1ab4b0111abc 100644
>> --- a/arch/powerpc/include/asm/pnv-pci.h
>> +++ b/arch/powerpc/include/asm/pnv-pci.h
>> @@ -27,12 +27,8 @@ extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);
>> extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
>> struct opal_msg *msg);
>>
>> -extern int pnv_pci_enable_tunnel(struct pci_dev *dev, uint64_t *asnind);
>> -extern int pnv_pci_disable_tunnel(struct pci_dev *dev);
>> extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,
>> int enable);
>> -extern int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid,
>> - u32 *pid, u32 *tid);
>
> IIRC as-notify was for CAPI which has an in-tree driver (cxl). Fred or
> Andrew (+cc), what's going on with this? Will it ever see the light of
> day?
The as-notify can be used in both CAPI mode and PCI mode. In capi mode,
it's integrated in the capi protocol, so the cxl driver doesn't need to
do extra setup, compared to what's already done to activate capi.
As mentioned in a previous iteration of that patchset, those APIs are to
be used by the Mellanox CX5 driver. The in-tree driver is always a step
behind their latest, but word is they are working on upstreaming those
interactions.
Fred
>> int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);
>> int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
>> unsigned int virq);
>> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>> index 126602b4e399..6b0caa2d0425 100644
>> --- a/arch/powerpc/platforms/powernv/pci-ioda.c
>> +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>> @@ -54,6 +54,8 @@
>> static const char * const pnv_phb_names[] = { "IODA1", "IODA2", "NPU_NVLINK",
>> "NPU_OCAPI" };
>>
>> +static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
>> +
>> void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
>> const char *fmt, ...)
>> {
>> @@ -2360,7 +2362,7 @@ static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group,
>> return 0;
>> }
>>
>> -void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable)
>> +static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable)
>> {
>> uint16_t window_id = (pe->pe_number << 1 ) + 1;
>> int64_t rc;
>> diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
>> index 8d28f2932c3b..fc69f5611020 100644
>> --- a/arch/powerpc/platforms/powernv/pci.c
>> +++ b/arch/powerpc/platforms/powernv/pci.c
>> @@ -868,54 +868,6 @@ struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
>> }
>> EXPORT_SYMBOL(pnv_pci_get_phb_node);
>>
>> -int pnv_pci_enable_tunnel(struct pci_dev *dev, u64 *asnind)
>> -{
>> - struct device_node *np;
>> - const __be32 *prop;
>> - struct pnv_ioda_pe *pe;
>> - uint16_t window_id;
>> - int rc;
>> -
>> - if (!radix_enabled())
>> - return -ENXIO;
>> -
>> - if (!(np = pnv_pci_get_phb_node(dev)))
>> - return -ENXIO;
>> -
>> - prop = of_get_property(np, "ibm,phb-indications", NULL);
>> - of_node_put(np);
>> -
>> - if (!prop || !prop[1])
>> - return -ENXIO;
>> -
>> - *asnind = (u64)be32_to_cpu(prop[1]);
>> - pe = pnv_ioda_get_pe(dev);
>> - if (!pe)
>> - return -ENODEV;
>> -
>> - /* Increase real window size to accept as_notify messages. */
>> - window_id = (pe->pe_number << 1 ) + 1;
>> - rc = opal_pci_map_pe_dma_window_real(pe->phb->opal_id, pe->pe_number,
>> - window_id, pe->tce_bypass_base,
>> - (uint64_t)1 << 48);
>> - return opal_error_code(rc);
>> -}
>> -EXPORT_SYMBOL_GPL(pnv_pci_enable_tunnel);
>> -
>> -int pnv_pci_disable_tunnel(struct pci_dev *dev)
>> -{
>> - struct pnv_ioda_pe *pe;
>> -
>> - pe = pnv_ioda_get_pe(dev);
>> - if (!pe)
>> - return -ENODEV;
>> -
>> - /* Restore default real window size. */
>> - pnv_pci_ioda2_set_bypass(pe, true);
>> - return 0;
>> -}
>> -EXPORT_SYMBOL_GPL(pnv_pci_disable_tunnel);
>> -
>> int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
>> {
>> __be64 val;
>> @@ -970,29 +922,6 @@ int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
>> }
>> EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);
>>
>> -#ifdef CONFIG_PPC64 /* for thread.tidr */
>> -int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
>> - u32 *tid)
>> -{
>> - struct mm_struct *mm = NULL;
>> -
>> - if (task == NULL)
>> - return -EINVAL;
>> -
>> - mm = get_task_mm(task);
>> - if (mm == NULL)
>> - return -EINVAL;
>> -
>> - *pid = mm->context.id;
>> - mmput(mm);
>> -
>> - *tid = task->thread.tidr;
>> - *lpid = mfspr(SPRN_LPID);
>> - return 0;
>> -}
>> -EXPORT_SYMBOL_GPL(pnv_pci_get_as_notify_info);
>> -#endif
>> -
>> void pnv_pci_shutdown(void)
>> {
>> struct pci_controller *hose;
>> diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
>> index 4f11c077af62..469c24463247 100644
>> --- a/arch/powerpc/platforms/powernv/pci.h
>> +++ b/arch/powerpc/platforms/powernv/pci.h
>> @@ -195,7 +195,6 @@ extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
>> extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
>> extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev);
>> extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq);
>> -extern void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
>> extern unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,
>> __u64 window_size, __u32 levels);
>> extern int pnv_eeh_post_init(void);
>> --
>> 2.20.1
>>
>
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