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Message-ID: <CAARK3H=CmxSG2srUaoxN1HF6W7CVKtpATrf89n6kuht2Paqp8A@mail.gmail.com>
Date: Fri, 21 Jun 2019 15:58:50 +0530
From: Sagar Kadam <sagar.kadam@...ive.com>
To: Vignesh Raghavendra <vigneshr@...com>
Cc: marek.vasut@...il.com, tudor.ambarus@...rochip.com,
dwmw2@...radead.org, computersforpeace@...il.com,
miquel.raynal@...tlin.com, richard@....at,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Palmer Dabbelt <palmer@...ive.com>, aou@...s.berkeley.edu,
Paul Walmsley <paul.walmsley@...ive.com>,
Wesley Terpstra <wesley@...ive.com>
Subject: Re: [PATCH v5 1/3] mtd: spi-nor: add support for is25wp256
Hello Vignesh,
On Fri, Jun 21, 2019 at 11:33 AM Vignesh Raghavendra <vigneshr@...com> wrote:
>
> Hi,
>
> On 17/06/19 8:48 PM, Sagar Kadam wrote:
> > Hello Vignesh,
> >
> > Thanks for your review comments.
> >
> > On Sun, Jun 16, 2019 at 6:14 PM Vignesh Raghavendra <vigneshr@...com> wrote:
> >>
> >> Hi,
> >>
> >> On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote:
> >> [...]
> >>
> >>> @@ -4129,7 +4137,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> >>> if (ret)
> >>> return ret;
> >>>
> >>> - if (nor->addr_width) {
> >>> + if (nor->addr_width && JEDEC_MFR(info) != SNOR_MFR_ISSI) {
> >>> /* already configured from SFDP */
> >>
> >> Hmm, why would you want to ignore addr_width that's read from SFDP table?
> >
> > The SFDP table for ISSI device considered here, has addr_width set to
> > 3 byte, and the flash considered
> > here is 32MB. With 3 byte address width we won't be able to access
> > flash memories higher address range.
>
> Is it specific to a particular ISSI part as indicated here[1]? If so,
> please submit solution agreed there i.e. use spi_nor_fixups callback
>
> [1]https://patchwork.ozlabs.org/patch/1056049/
>
Thanks for sharing the link.
>From what I understand here, it seems that "Address Bytes" of SFDP
table for the device under
consideration (is25lp256) supports 3 byte only Addressing mode
(DWORD1[18:17] = 0b00.
where as that of ISSI device (is25LP/WP 256Mb/512/Mb/1Gb) support 3 or
4 byte Addressing mode DWORD1[18:17] = 0b01.
> > Hence I have ignored the addr width from SFDP. I have verified that
> > with 3 byte address width, the
> > flascp util fails while verifying the written data. Please let me
> > know your views on this?
> >
> If this affects multiple ISSI parts then:
> Instead of checking for mfr code, look for SNOR_F_4B_OPCODES flag in
> flash_info struct of the device and let it take precedence over SFDP in
> case size is over 16MB
>
So as per your suggestion I think second approach is a better one.
I will send this in V6.
Thanks & Regards,
Sagar
> Regards
> Vignesh
>
> > BR,
> > Sagar Kadam
> >
> >> Regards
> >> Vignesh
> >>
> >>
> >>> } else if (info->addr_width) {
> >>> nor->addr_width = info->addr_width;
> >>> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> >>> index b3d360b..ff13297 100644
> >>> --- a/include/linux/mtd/spi-nor.h
> >>> +++ b/include/linux/mtd/spi-nor.h
> >>> @@ -19,6 +19,7 @@
> >>> #define SNOR_MFR_ATMEL CFI_MFR_ATMEL
> >>> #define SNOR_MFR_GIGADEVICE 0xc8
> >>> #define SNOR_MFR_INTEL CFI_MFR_INTEL
> >>> +#define SNOR_MFR_ISSI 0x9d /* ISSI */
> >>> #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
> >>> #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
> >>> #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
> >>>
>
> --
> Regards
> Vignesh
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