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Message-ID: <1e397063-9cf2-69d3-84fe-53c5776f2c5b@fau.de>
Date: Fri, 21 Jun 2019 15:01:38 +0200
From: Lukas Schneider <lukas.s.schneider@....de>
To: Pavel Machek <pavel@....cz>
Cc: kim.jamie.bradley@...il.com, pakki001@....edu,
colin.king@...onical.com, devel@...verdev.osuosl.org,
linux-kernel@...r.kernel.org, Jannik Moritz <jannik.moritz@....de>,
linux-kernel@...cs.fau.de
Subject: Re: [PATCH 4/4] rts5208: Fix usleep range is preferred over udelay
Am 21.06.2019 um 13:04 schrieb Pavel Machek:
> On Wed 2019-06-19 17:46:48, Lukas Schneider wrote:
>> This patch fixes the issue reported by checkpatch:
>>
>> CHECK: usleep_range is preferred over udelay;
>> see Doucmentation/timers/timers-howto.txt
>>
>> It's save to sleep here instead of using busy waiting,
>> because we are not in an atomic context.
> Is it good idea? How can the system really sleep for 50 usec?
>
> Pavel
According to Doucmentation/timers/timers-howto.txt, usleep_range should
be used for sleep times between 10us and 20ms, so it is the correct
function for 50us.
Lukas
>> @@ -865,7 +865,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
>> PHASE_CHANGE);
>> if (retval)
>> return retval;
>> - udelay(50);
>> + usleep_range(50, 60);
>> retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
>> PHASE_CHANGE |
>> PHASE_NOT_RESET |
>> @@ -877,14 +877,14 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
>> CHANGE_CLK, CHANGE_CLK);
>> if (retval)
>> return retval;
>> - udelay(50);
>> + usleep_range(50, 60);
>> retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
>> PHASE_NOT_RESET |
>> sample_point);
>> if (retval)
>> return retval;
>> }
>> - udelay(100);
>> + usleep_range(100, 110);
>>
>> rtsx_init_cmd(chip);
>> rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
>> @@ -918,7 +918,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
>> return retval;
>> }
>>
>> - udelay(50);
>> + usleep_range(50, 60);
>> }
>>
>> retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
>> @@ -1416,7 +1416,7 @@ static int sd_wait_data_idle(struct rtsx_chip *chip)
>> retval = STATUS_SUCCESS;
>> break;
>> }
>> - udelay(100);
>> + usleep_range(100, 110);
>> }
>> dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
>>
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