[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1561137211-12406-2-git-send-email-sagar.kadam@sifive.com>
Date: Fri, 21 Jun 2019 22:43:29 +0530
From: Sagar Shrikant Kadam <sagar.kadam@...ive.com>
To: marek.vasut@...il.com, tudor.ambarus@...rochip.com,
dwmw2@...radead.org, computersforpeace@...il.com,
miquel.raynal@...tlin.com, richard@....at, vigneshr@...com
Cc: palmer@...ive.com, aou@...s.berkeley.edu, paul.walmsley@...ive.com,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Sagar Shrikant Kadam <sagar.kadam@...ive.com>
Subject: [PATCH v6 1/3] mtd: spi-nor: add support for is25wp256
Update spi_nor_id table for is25wp256 (32MB) device from ISSI,
present on HiFive Unleashed dev board (Rev: A00).
Set method to enable quad mode for ISSI device in flash parameters
table. Set address width to 4byte if device supports 4Byte opcode and
it's size is greater than 16MiB.
Based on code originally written by Wesley Terpstra <wesley@...ive.com>
and/or Palmer Dabbelt <palmer@...ive.com>
https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@...ive.com>
---
drivers/mtd/spi-nor/spi-nor.c | 19 +++++++++++++++----
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 73172d7..c816f0c 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1834,6 +1834,10 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 1024,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_4B_OPCODES)
+ },
/* Macronix */
{ "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },
@@ -3652,6 +3656,10 @@ static int spi_nor_init_params(struct spi_nor *nor,
case SNOR_MFR_MACRONIX:
params->quad_enable = macronix_quad_enable;
break;
+ case SNOR_MFR_ISSI:
+ params->quad_enable = macronix_quad_enable;
+ break;
+
case SNOR_MFR_ST:
case SNOR_MFR_MICRON:
@@ -4129,13 +4137,16 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
if (ret)
return ret;
- if (nor->addr_width) {
+ if (info->flags & SPI_NOR_4B_OPCODES && mtd->size > 0x1000000) {
+ /*
+ * enable 4-byte addressing if device supports it and
+ * its size exceeds 16MiB.
+ */
+ nor->addr_width = 4;
+ } else if (nor->addr_width) {
/* already configured from SFDP */
} else if (info->addr_width) {
nor->addr_width = info->addr_width;
- } else if (mtd->size > 0x1000000) {
- /* enable 4-byte addressing if the device exceeds 16MiB */
- nor->addr_width = 4;
} else {
nor->addr_width = 3;
}
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index b3d360b..ff13297 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -19,6 +19,7 @@
#define SNOR_MFR_ATMEL CFI_MFR_ATMEL
#define SNOR_MFR_GIGADEVICE 0xc8
#define SNOR_MFR_INTEL CFI_MFR_INTEL
+#define SNOR_MFR_ISSI 0x9d /* ISSI */
#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
#define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
--
1.9.1
Powered by blists - more mailing lists