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Message-Id: <20190623123850.22584-2-Anson.Huang@nxp.com>
Date: Sun, 23 Jun 2019 20:38:49 +0800
From: Anson.Huang@....com
To: daniel.lezcano@...aro.org, tglx@...utronix.de, robh+dt@...nel.org,
mark.rutland@....com, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, l.stach@...gutronix.de,
abel.vesa@....com, ccaione@...libre.com, angus@...ea.ca,
andrew.smirnov@...il.com, agx@...xcpu.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: Linux-imx@....com
Subject: [PATCH RESEND V2 2/3] clocksource: imx-sysctr: Make timer work with clock driver using platform driver model
From: Anson Huang <Anson.Huang@....com>
On some i.MX8M platforms, clock driver uses platform driver
model and it is NOT ready during timer initialization phase,
the clock operations will fail and system counter driver will
fail too. As all the i.MX8M platforms' system counter clock
are from OSC which is always enabled, so it is no need to enable
clock for system counter driver, the ONLY thing is to pass
clock frequence to driver.
To make system counter driver work for upper scenario, add an
option of skipping of_clk operation for system counter driver,
an optional property "clock-frequency" is introduced to pass
the frequency value to system counter driver and indicate driver
to skip of_clk operations.
Signed-off-by: Anson Huang <Anson.Huang@....com>
---
Changes since V1:
- improve commit log, no content change.
---
drivers/clocksource/timer-imx-sysctr.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clocksource/timer-imx-sysctr.c b/drivers/clocksource/timer-imx-sysctr.c
index fd7d680..8ff3d7e 100644
--- a/drivers/clocksource/timer-imx-sysctr.c
+++ b/drivers/clocksource/timer-imx-sysctr.c
@@ -129,6 +129,14 @@ static void __init sysctr_clockevent_init(void)
static int __init sysctr_timer_init(struct device_node *np)
{
int ret = 0;
+ u32 rate;
+
+ if (!of_property_read_u32(np, "clock-frequency",
+ &rate)) {
+ to_sysctr.of_clk.rate = rate;
+ to_sysctr.of_clk.period = DIV_ROUND_UP(rate, HZ);
+ to_sysctr.flags &= ~TIMER_OF_CLOCK;
+ }
ret = timer_of_init(np, &to_sysctr);
if (ret)
--
2.7.4
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