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Message-ID: <20190624150758.6695-5-rrichter@marvell.com>
Date:   Mon, 24 Jun 2019 15:09:00 +0000
From:   Robert Richter <rrichter@...vell.com>
To:     Borislav Petkov <bp@...en8.de>, James Morse <james.morse@....com>,
        "Mauro Carvalho Chehab" <mchehab@...nel.org>
CC:     "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Robert Richter <rrichter@...vell.com>
Subject: [PATCH v2 04/24] EDAC, ghes: Unify trace_mc_event() code with edac_mc
 driver

Duplicate code, remove it. The only difference is the missing
IS_ENABLED(CONFIG_RAS) switch in ghes_edac which we will need there
too.

Signed-off-by: Robert Richter <rrichter@...vell.com>
---
 drivers/edac/edac_mc.c   | 34 +++++++++++++++++-----------------
 drivers/edac/ghes_edac.c | 16 +---------------
 2 files changed, 18 insertions(+), 32 deletions(-)

diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index 45cac74ab833..4bbc8aeddf30 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -1056,6 +1056,23 @@ void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type,
 {
 	char detail[80];
 	int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
+	u8 grain_bits;
+
+	/*
+	 * We expect the hw to report a reasonable grain, fallback to
+	 * 1 byte granularity otherwise.
+	 */
+	if (WARN_ON_ONCE(!e->grain))
+		e->grain = 1;
+	grain_bits = fls_long(e->grain - 1);
+
+	/* Report the error via the trace interface */
+	if (IS_ENABLED(CONFIG_RAS))
+		trace_mc_event(type, e->msg, e->label, e->error_count,
+			       mci->mc_idx, e->top_layer, e->mid_layer,
+			       e->low_layer,
+			       (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
+			       grain_bits, e->syndrome, e->other_detail);
 
 	/* Memory type dependent details about the error */
 	if (type == HW_EVENT_ERR_CORRECTED) {
@@ -1095,7 +1112,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
 	int row = -1, chan = -1;
 	int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
 	int i, n_labels = 0;
-	u8 grain_bits;
 	struct edac_raw_error_desc *e = &mci->error_desc;
 
 	edac_dbg(3, "MC%d\n", mci->mc_idx);
@@ -1235,22 +1251,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
 	if (p > e->location)
 		*(p - 1) = '\0';
 
-	/*
-	 * We expect the hw to report a reasonable grain, fallback to
-	 * 1 byte granularity otherwise.
-	 */
-	if (WARN_ON_ONCE(!e->grain))
-		e->grain = 1;
-	grain_bits = fls_long(e->grain - 1);
-
-	/* Report the error via the trace interface */
-	if (IS_ENABLED(CONFIG_RAS))
-		trace_mc_event(type, e->msg, e->label, e->error_count,
-			       mci->mc_idx, e->top_layer, e->mid_layer,
-			       e->low_layer,
-			       (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
-			       grain_bits, e->syndrome, e->other_detail);
-
 	edac_raw_mc_handle_error(type, mci, e);
 }
 EXPORT_SYMBOL_GPL(edac_mc_handle_error);
diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index 049de73c3bad..bd3be25d0d3f 100644
--- a/drivers/edac/ghes_edac.c
+++ b/drivers/edac/ghes_edac.c
@@ -200,7 +200,6 @@ void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
 	struct ghes_edac_pvt *pvt = ghes_pvt;
 	unsigned long flags;
 	char *p;
-	u8 grain_bits;
 
 	if (!pvt)
 		return;
@@ -436,21 +435,8 @@ void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
 	if (p > pvt->other_detail)
 		*(p - 1) = '\0';
 
-	/*
-	 * We expect the hw to report a reasonable grain, fallback to
-	 * 1 byte granularity otherwise.
-	 */
-	if (WARN_ON_ONCE(!e->grain))
-		e->grain = 1;
-	grain_bits = fls_long(e->grain - 1);
-
-	/* Generate the trace event */
-	trace_mc_event(type, e->msg, e->label, e->error_count,
-		       mci->mc_idx, e->top_layer, e->mid_layer, e->low_layer,
-		       (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
-		       grain_bits, e->syndrome, e->other_detail);
-
 	edac_raw_mc_handle_error(type, mci, e);
+
 	spin_unlock_irqrestore(&ghes_lock, flags);
 }
 
-- 
2.20.1

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