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Message-ID: <OFFCBB8981.B840C87C-ON48258423.00311FA8-48258423.0031EBDD@mxic.com.tw>
Date: Mon, 24 Jun 2019 17:05:16 +0800
From: masonccyang@...c.com.tw
To: "Miquel Raynal" <miquel.raynal@...tlin.com>
Cc: bbrezillon@...nel.org,
"Boris Brezillon" <boris.brezillon@...labora.com>,
broonie@...nel.org, christophe.kerello@...com,
computersforpeace@...il.com, devicetree@...r.kernel.org,
dwmw2@...radead.org, geert@...ux-m68k.org, juliensu@...c.com.tw,
lee.jones@...aro.org, liang.yang@...ogic.com,
linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
linux-spi@...r.kernel.org, marcel.ziswiler@...adex.com,
marek.vasut@...il.com, mark.rutland@....com, paul.burton@...s.com,
richard@....at, robh+dt@...nel.org, stefan@...er.ch,
zhengxunli@...c.com.tw
Subject: Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller
Hi Miquel,
> > > > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > > > low-power standby mode if driver don't use
> > "legacy.select_chip()"
> > > > > ?
> > > > > > > >
> > > > > > > > See commit 02b4a52604a4 ("mtd: rawnand: Make
->select_chip()
> > > > > optional
> > > > > > > > when ->exec_op() is implemented") which states:
> > > > > > > >
> > > > > > > > "When [->select_chip() is] not implemented, the
core
> > is
> > > > > assuming
> > > > > > > > the CS line is automatically asserted/deasserted by the
> > driver
> > > > > > > > ->exec_op() implementation."
> > > > > > > >
> > > > > > > > Of course, the above is right only when the controller
driver
> >
> > > > > supports
> > > > > > > > the ->exec_op() interface.
> > > > > > >
> > > > > > > Currently, it seems that we will get the incorrect data and
> > error
> > > > > > > operation due to CS in error toggling if CS line is
controlled
> > in
> > > > > > > ->exec_op().
> > >
> > > Oh, and please provide the modifications you added on top of this
patch.
> > > Right now we're speculating on what you've done which is definitely
not
> > > an efficient way to debug this sort of issues.
> >
>
> We really need to see the datasheet of the NAND chip which has a
> problem and how this LPM mode is advertized to understand what the
> chip expects and eventually how to work-around it.
>
> > The patch is to add in beginning of ->exec_op() to control CS# low and
> > before return from ->exec_op() to control CS# High.
> > i.e,.
> > static in mxic_nand_exec_op( )
> > {
> > cs_to_low();
> >
> >
> >
> > cs_to_high();
> > return;
> > }
> >
> > But for nand_onfi_detect(),
> > it calls nand_read_param_page_op() and then nand_read_data_op().
> > mxic_nand_exec_op() be called twice for nand_onfi_detect()
>
> Yes, this is expected and usually chips don't care.
As I replied to Boris's email previously.
I think I have fixed the problem and the root cause is the our NFC's TX
FIFO
counter do a unnecessary reset in CS control function.
currently, doing CS# control in ->exec_op() is OK to me.
In addition, by Jones's comments about MFD,
I will re-submit this raw NAND ctlr driver instead of MFD and raw-nand.
----------------------------------------------------------------------->
MFD is for registering child devices of chips which offer
genuine cross-subsystem functionality.
It is not designed for mode selecting, or as a place to shove shared code
just because a better location doesn't appear to exist.
------------------------------------------------------------------------<
thanks & best regards,
Mason
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This e-mail and any attachments may contain confidential information and/or personal data, which is protected by applicable laws. Please be reminded that duplication, disclosure, distribution, or use of this e-mail (and/or its attachments) or any part thereof is prohibited. If you receive this e-mail in error, please notify us immediately and delete this mail as well as its attachment(s) from your system. In addition, please be informed that collection, processing, and/or use of personal data is prohibited unless expressly permitted by personal data protection laws. Thank you for your attention and cooperation.
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