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Date: Tue, 25 Jun 2019 15:06:01 +0800 From: Anson.Huang@....com To: mturquette@...libre.com, sboyd@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com, leonard.crestez@....com, ping.bai@....com, peng.fan@....com, linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Cc: Linux-imx@....com Subject: [PATCH 1/2] clk: imx8mm: Fix typo of pwm3 clock's mux option #4 From: Anson Huang <Anson.Huang@....com> i.MX8MM has no sys3_pll2_out clock, PWM3 clock's mux option #4 should be sys_pll3_out, sys3_pll2_out is a typo, fix it. Signed-off-by: Anson Huang <Anson.Huang@....com> --- drivers/clk/imx/clk-imx8mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 56d53dd..516e68d 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -287,7 +287,7 @@ static const char *imx8mm_pwm2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_1 "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", }; static const char *imx8mm_pwm3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", - "sys3_pll2_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; + "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; static const char *imx8mm_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; -- 2.7.4
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