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Message-ID: <CACRpkdYgXZzvFKyvySWnsJ2_1pA1e_VHEY-QNzNYCikMUc_WVg@mail.gmail.com>
Date:   Tue, 25 Jun 2019 14:31:00 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     alpawi@...zon.com
Cc:     Benjamin Herrenschmidt <benh@...zon.com>,
        Jason Cooper <jason@...edaemon.net>,
        Andrew Lunn <andrew@...n.ch>,
        Gregory Clement <gregory.clement@...tlin.com>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/2] pinctl: armada-37xx: fix for pins 32+

On Tue, Jun 18, 2019 at 6:01 PM <alpawi@...zon.com> wrote:

> From: Patrick Williams <alpawi@...zon.com>
>
> The 37xx GPIO config registers are only 32 bits long and
> span 2 registers for the NB GPIO controller.  The function
> to calculate the offset was missing the increase to the
> config register.
>
> I have tested both raw gpio access and interrupts using
> libgpiod utilities on an Espressonbin.
>
> The first patch is a simple rename of a function because
> the original name implied it was doing IO itself ("update
> reg").  This patch could be dropped if undesired.
>
> The second patch contains the fix for GPIOs 32+.

This looks good overall. I am waiting for a maintainer review.
If nothing happens in a week, poke me and I'll just apply
the patches.

Yours,
Linus Walleij

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