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Message-ID: <e4dafd8a-8d14-63cb-f793-4d784051d2a0@amd.com>
Date: Tue, 25 Jun 2019 14:26:54 +0000
From: "Koenig, Christian" <Christian.Koenig@....com>
To: Lucas Stach <l.stach@...gutronix.de>,
"Wentland, Harry" <Harry.Wentland@....com>,
"airlied@...il.com" <airlied@...il.com>,
"natechancellor@...il.com" <natechancellor@...il.com>
CC: "Li, Sun peng (Leo)" <Sunpeng.Li@....com>,
"Koo, Anthony" <Anthony.Koo@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"amd-gfx@...ts.freedesktop.org" <amd-gfx@...ts.freedesktop.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"Deucher, Alexander" <Alexander.Deucher@....com>,
"Lei, Jun" <Jun.Lei@....com>,
"Lakha, Bhawanpreet" <Bhawanpreet.Lakha@....com>
Subject: Re: [PATCH] drm/amd/display: Use msleep instead of udelay for 8ms
wait
Am 25.06.19 um 16:12 schrieb Lucas Stach:
> Hi Harry,
>
> Am Dienstag, den 25.06.2019, 10:00 -0400 schrieb Harry Wentland:
>> arm32's udelay only allows values up to 2000 microseconds. msleep
>> does the trick for us here as there is no problem if this isn't
>> microsecond accurate and takes a tad longer.
> A "tad" longer in this case means likely double the intended wait.
> Please see "SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms)" in
> Documentation/timers/timers-howto.txt.
Oh, thanks so much for the link! I was searching desperately for this
the last time this came up and couldn't find it.
Clearly going to remember now where to find that.
Thanks,
Christian.
>
> The sleep here should use usleep_range. In general the DC code seems to
> use quite a lot of the udelay busy waits. I doubt that many of those
> occurrences are in atomic context, so could easily use a sleeping wait.
>
> Digging further this seems to apply across amdgpu, not only DC.
>
> Regards,
> Lucas
>
>> Signed-off-by: Harry Wentland <harry.wentland@....com>
>> ---
>> drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> index 4c31930f1cdf..f5d02f89b3f9 100644
>> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> @@ -548,7 +548,7 @@ static void
>> read_edp_current_link_settings_on_detect(struct dc_link *link)
>> break;
>> }
>>
>> - udelay(8000);
>> + msleep(8);
>> }
>>
>> ASSERT(status == DC_OK);
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