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Message-Id: <20190625161804.38713-2-vincenzo.frascino@arm.com>
Date: Tue, 25 Jun 2019 17:18:03 +0100
From: Vincenzo Frascino <vincenzo.frascino@....com>
To: linux-arch@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
linux-kselftest@...r.kernel.org
Cc: catalin.marinas@....com, will.deacon@....com, arnd@...db.de,
linux@...linux.org.uk, ralf@...ux-mips.org, paul.burton@...s.com,
daniel.lezcano@...aro.org, tglx@...utronix.de, salyzyn@...roid.com,
pcc@...gle.com, shuah@...nel.org, 0x7f454c46@...il.com,
linux@...musvillemoes.dk, huw@...eweavers.com,
sthotton@...vell.com, andre.przywara@....com
Subject: [PATCH 2/3] arm64: Fix __arch_get_hw_counter() implementation
Provide the following fixes for the __arch_get_hw_counter()
implementation on arm64:
- Fallback on syscall when an unstable counter is detected.
- Introduce isb()s before and after the counter read to avoid
speculation of the counter value and of the seq lock
respectively.
The second isb() is a temporary solution that will be revisited
in 5.3-rc1.
These fixes restore the semantics that __arch_counter_get_cntvct()
had on arm64.
Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Will Deacon <will.deacon@....com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@....com>
---
arch/arm64/include/asm/vdso/gettimeofday.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/include/asm/vdso/gettimeofday.h b/arch/arm64/include/asm/vdso/gettimeofday.h
index 447ef417de45..b08f476b72b4 100644
--- a/arch/arm64/include/asm/vdso/gettimeofday.h
+++ b/arch/arm64/include/asm/vdso/gettimeofday.h
@@ -10,6 +10,8 @@
#include <asm/unistd.h>
#include <uapi/linux/time.h>
+#define __VDSO_USE_SYSCALL ULLONG_MAX
+
#define VDSO_HAS_CLOCK_GETRES 1
static __always_inline
@@ -68,7 +70,24 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode)
{
u64 res;
+ /*
+ * clock_mode == 0 implies that vDSO are enabled otherwise
+ * fallback on syscall.
+ */
+ if (clock_mode)
+ return __VDSO_USE_SYSCALL;
+
+ /*
+ * This isb() is required to prevent that the counter value
+ * is speculated.
+ */
+ isb();
asm volatile("mrs %0, cntvct_el0" : "=r" (res) :: "memory");
+ /*
+ * This isb() is required to prevent that the seq lock is
+ * speculated.#
+ */
+ isb();
return res;
}
--
2.22.0
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