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Date: Wed, 26 Jun 2019 14:23:21 -0700 (PDT) From: Paul Walmsley <paul.walmsley@...ive.com> To: Rob Herring <robh@...nel.org> cc: linux-riscv@...ts.infradead.org, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: Re: [PATCH] dt-bindings: riscv: resolve 'make dt_binding_check' warnings On Wed, 26 Jun 2019, Rob Herring wrote: > Sorry, I guess the indentation change threw me off... > > For fixing the dtc warnings: > > Reviewed-by: Rob Herring <robh@...nel.org> Thanks, I've queued the following patch for v5.2-rc. Will address the schema-related issues in separate patches. - Paul From: Paul Walmsley <paul.walmsley@...ive.com> Date: Wed, 26 Jun 2019 08:19:29 -0700 Subject: [PATCH] dt-bindings: riscv: resolve 'make dt_binding_check' warnings Rob pointed out that one of the examples in the RISC-V 'cpus' YAML schema results in warnings from 'make dt_binding_check'. Fix these. While here, make the whitespace in the second example consistent with the first example. Signed-off-by: Paul Walmsley <paul.walmsley@...ive.com> Cc: Rob Herring <robh@...nel.org> Reviewed-by: Rob Herring <robh@...nel.org> # for fixing the dtc warnings --- .../devicetree/bindings/riscv/cpus.yaml | 26 ++++++++++--------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index 27f02ec4bb45..f97a4ecd7b91 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -152,17 +152,19 @@ examples: - | // Example 2: Spike ISA Simulator with 1 Hart cpus { - cpu@0 { - device_type = "cpu"; - reg = <0>; - compatible = "riscv"; - riscv,isa = "rv64imafdc"; - mmu-type = "riscv,sv48"; - interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + reg = <0>; + compatible = "riscv"; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv48"; + interrupt-controller { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; }; ... -- 2.20.1
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