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Message-ID: <CAEnQRZBNA4ndSL1vMStHemYkzt9TxqjgdWWjqFwnBFQ+ha+egA@mail.gmail.com>
Date: Wed, 26 Jun 2019 17:49:21 +0300
From: Daniel Baluta <daniel.baluta@...il.com>
To: Rob Herring <robh+dt@...nel.org>
Cc: Daniel Baluta <daniel.baluta@....com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
"S.j. Wang" <shengjiu.wang@....com>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Dong Aisheng <aisheng.dong@....com>,
Anson Huang <anson.huang@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
Mark Rutland <mark.rutland@....com>,
Devicetree List <devicetree@...r.kernel.org>,
Oleksij Rempel <o.rempel@...gutronix.de>
Subject: Re: [PATCH 2/2] dt-bindings: arm: fsl: Add DSP IPC binding support
Hi Rob,
This is my first time documenting the bindings using the
new yaml format so thanks for your patience and explanations!
On Fri, Jun 14, 2019 at 5:53 PM Rob Herring <robh+dt@...nel.org> wrote:
>
> On Fri, Jun 14, 2019 at 2:15 AM <daniel.baluta@....com> wrote:
> >
> > From: Daniel Baluta <daniel.baluta@....com>
> >
> > DSP IPC is the layer that allows the Host CPU to communicate
> > with DSP firmware.
> > DSP is part of some i.MX8 boards (e.g i.MX8QM, i.MX8QXP)
> >
> > Signed-off-by: Daniel Baluta <daniel.baluta@....com>
> > ---
> > .../bindings/arm/freescale/fsl,dsp.yaml | 43 +++++++++++++++++++
>
> bindings/dsp/...
Fair enough. Will fix in v2.
>
> > 1 file changed, 43 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,dsp.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,dsp.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,dsp.yaml
> > new file mode 100644
> > index 000000000000..16d9df1d397b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,dsp.yaml
> > @@ -0,0 +1,43 @@
> > +# SPDX-License-Identifier: GPL-2.0
>
> The preference is to dual license new bindings: GPL-2.0 OR BSD-2-Clause
>
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/freescale/fsl,dsp.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NXP i.MX IPC DSP driver
>
> This isn't a driver.
I see. This node is actually the representation of DSP IPC so not a driver.
>
> > +
> > +maintainers:
> > + - Daniel Baluta <daniel.baluta@....com>
> > +
> > +description: |
> > + IPC communication layer between Host CPU and DSP on NXP i.MX8 platforms
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - fsl,imx-dsp
>
> You can have a fallback, but it needs SoC specific compatible(s).
Agree. Will fix in v2.
>
> > +
> > + mboxes:
> > + description:
> > + List of phandle of 2 MU channels for TXDB, 2 MU channels for RXDB
> > + (see mailbox/fsl,mu.txt)
> > + maxItems: 1
>
> Should be 4?
Actually is just a list with 1 item. I think is the terminology:
You can have an example here of the mboxes defined for SCU.
https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx8qxp.dtsi#L123
>
> > +
> > + mbox-names
> > + description:
> > + Mailboxes names
> > + allOf:
> > + - $ref: "/schemas/types.yaml#/definitions/string"
>
> No need for this, '*-names' already has a defined type.
So, should I remove the above two lines ?
>
> > + - enum: [ "txdb0", "txdb1", "rxdb0", "rxdb1" ]
>
> Should be an 'items' list with 4 entries?
Let me better read the yaml spec. But "items" list indeed sounds better.
>
> > +required:
> > + - compatible
> > + - mboxes
> > + - mbox-names
>
> This seems incomplete. How does one boot the DSP? Load firmware? No
> resources that Linux has to manage. Shared memory?
This is only the IPC mailboxes used by DSP to communicate with Linux. The
loading of the firmware, the resources needed to be managed by Linux, etc
are part of the DSP node.
To avoid confusion I have renamed this node from dsp to dsp_ipc.
>
> > +
> > +examples:
> > + - |
> > + dsp {
> > + compatbile = "fsl,imx-dsp";
> > + mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
> > + mboxes = <&lsio_mu13 2 0 &lsio_mu13 2 1 &lsio_mu13 3 0 &lsio_mu13 3 1>;
>
> mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
Actually no! It looks like the imx mailbox expects one element with a
list of phandles directions and index.
See again, how SCU uses the mailbox node.
https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx8qxp.dtsi#L123
>
> > + };
> > --
> > 2.17.1
> >
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