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Message-Id: <20190628023838.15426-6-andrew@aj.id.au>
Date: Fri, 28 Jun 2019 12:08:35 +0930
From: Andrew Jeffery <andrew@...id.au>
To: linux-gpio@...r.kernel.org
Cc: ryan_chen@...eedtech.com, Andrew Jeffery <andrew@...id.au>,
linus.walleij@...aro.org, robh+dt@...nel.org, mark.rutland@....com,
joel@....id.au, linux-aspeed@...ts.ozlabs.org,
openbmc@...ts.ozlabs.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Johnny Huang <johnny_huang@...eedtech.com>
Subject: [PATCH v2 5/8] pinctrl: aspeed: Correct comment that is no longer true
We have handled the GFX register case for quite some time now.
Cc: Johnny Huang <johnny_huang@...eedtech.com>
Signed-off-by: Andrew Jeffery <andrew@...id.au>
Acked-by: Joel Stanley <joel@....id.au>
---
drivers/pinctrl/aspeed/pinctrl-aspeed.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
index 4b06ddbc6aec..c5918c4a087c 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
@@ -240,8 +240,7 @@
* opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
* reference registers beyond those dedicated to pinmux, such as the system
* reset control and MAC clock configuration registers. The AST2500 goes a step
- * further and references registers in the graphics IP block, but that isn't
- * handled yet.
+ * further and references registers in the graphics IP block.
*/
#define SCU2C 0x2C /* Misc. Control Register */
#define SCU3C 0x3C /* System Reset Control/Status Register */
--
2.20.1
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