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Message-ID: <alpine.DEB.2.21.9999.1906272243530.3867@viisi.sifive.com>
Date: Thu, 27 Jun 2019 22:47:06 -0700 (PDT)
From: Paul Walmsley <paul.walmsley@...ive.com>
To: Atish Patra <atish.patra@....com>
cc: linux-kernel@...r.kernel.org,
Christoph Hellwig <hch@...radead.org>,
Albert Ou <aou@...s.berkeley.edu>,
Thomas Gleixner <tglx@...utronix.de>,
Kees Cook <keescook@...omium.org>,
Changbin Du <changbin.du@...el.com>,
Anup Patel <anup@...infault.org>,
Palmer Dabbelt <palmer@...ive.com>,
"maintainer:X86 ARCHITECTURE 32-BIT AND 64-BIT" <x86@...nel.org>,
linux-mm@...ck.org, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Vlastimil Babka <vbabka@...e.cz>, Gary Guo <gary@...yguo.net>,
"H. Peter Anvin" <hpa@...or.com>,
Andrew Morton <akpm@...ux-foundation.org>,
linux-riscv@...ts.infradead.org,
Luc Van Oostenryck <luc.vanoostenryck@...il.com>
Subject: Re: [PATCH v3 3/3] RISC-V: Update tlb flush counters
On Mon, 29 Apr 2019, Atish Patra wrote:
> The TLB flush counters under vmstat seems to be very helpful while
> debugging TLB flush performance in RISC-V.
>
> Update the counters in every TLB flush methods respectively.
>
> Signed-off-by: Atish Patra <atish.patra@....com>
This one doesn't apply any longer. Care to update and repost?
- Paul
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