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Message-ID: <1561732552-143038-4-git-send-email-john.garry@huawei.com>
Date: Fri, 28 Jun 2019 22:35:51 +0800
From: John Garry <john.garry@...wei.com>
To: <peterz@...radead.org>, <mingo@...hat.com>, <acme@...nel.org>,
<alexander.shishkin@...ux.intel.com>, <jolsa@...hat.com>,
<namhyung@...nel.org>, <tmricht@...ux.ibm.com>,
<brueckner@...ux.ibm.com>, <kan.liang@...ux.intel.com>,
<ben@...adent.org.uk>, <mathieu.poirier@...aro.org>,
<mark.rutland@....com>, <will.deacon@....com>
CC: <linux-kernel@...r.kernel.org>, <linuxarm@...wei.com>,
<linux-arm-kernel@...ts.infradead.org>,
<zhangshaokun@...ilicon.com>, <ak@...ux.intel.com>,
John Garry <john.garry@...wei.com>
Subject: [PATCH v3 3/4] perf jevents: Add support for Hisi hip08 HHA PMU aliasing
Add support for Hisi hip08 HHA PMU aliasing.
The kernel driver is in drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
Signed-off-by: John Garry <john.garry@...wei.com>
---
.../arm64/hisilicon/hip08/uncore-hha.json | 51 +++++++++++++++++++
tools/perf/pmu-events/jevents.c | 1 +
2 files changed, 52 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
new file mode 100644
index 000000000000..447d3064de90
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
@@ -0,0 +1,51 @@
+[
+ {
+ "EventCode": "0x00",
+ "EventName": "uncore_hisi_hha.rx_ops_num",
+ "BriefDescription": "The number of all operations received by the HHA",
+ "PublicDescription": "The number of all operations received by the HHA",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x01",
+ "EventName": "uncore_hisi_hha.rx_outer",
+ "BriefDescription": "The number of all operations received by the HHA from another socket",
+ "PublicDescription": "The number of all operations received by the HHA from another socket",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x02",
+ "EventName": "uncore_hisi_hha.rx_sccl",
+ "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket",
+ "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1c",
+ "EventName": "uncore_hisi_hha.rd_ddr_64b",
+ "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
+ "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1d",
+ "EventName": "uncore_hisi_hha.wr_dr_64b",
+ "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
+ "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1e",
+ "EventName": "uncore_hisi_hha.rd_ddr_128b",
+ "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
+ "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+ {
+ "EventCode": "0x1f",
+ "EventName": "uncore_hisi_hha.wr_ddr_128b",
+ "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
+ "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
+ "Unit": "hisi_sccl,hha",
+ },
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index cf9a60333554..909e53e3b5bd 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -237,6 +237,7 @@ static struct map {
{ "CPU-M-SF", "cpum_sf" },
{ "UPI LL", "uncore_upi" },
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
+ { "hisi_sccl,hha", "hisi_sccl,hha" },
{}
};
--
2.17.1
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