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Message-ID: <1561687972-19319-19-git-send-email-skomatineni@nvidia.com>
Date: Thu, 27 Jun 2019 19:12:52 -0700
From: Sowjanya Komatineni <skomatineni@...dia.com>
To: <thierry.reding@...il.com>, <jonathanh@...dia.com>,
<tglx@...utronix.de>, <jason@...edaemon.net>,
<marc.zyngier@....com>, <linus.walleij@...aro.org>,
<stefan@...er.ch>, <mark.rutland@....com>
CC: <pdeschrijver@...dia.com>, <pgaikwad@...dia.com>,
<sboyd@...nel.org>, <linux-clk@...r.kernel.org>,
<linux-gpio@...r.kernel.org>, <jckuo@...dia.com>,
<josephl@...dia.com>, <talho@...dia.com>, <skomatineni@...dia.com>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<mperttunen@...dia.com>, <spatra@...dia.com>, <robh+dt@...nel.org>,
<digetx@...il.com>, <devicetree@...r.kernel.org>
Subject: [PATCH V5 18/18] arm64: dts: tegra210-p3450: Jetson nano SC7 timings
This patch adds Jetson nano platform specific SC7 timing configuration
in the device tree.
Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index 9d17ec707bce..b81bfdfbc115 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -382,6 +382,13 @@
pmc@...0e400 {
nvidia,invert-interrupt;
++ nvidia,suspend-mode = <0>;
+ nvidia,cpu-pwr-good-time = <0>;
+ nvidia,cpu-pwr-off-time = <0>;
+ nvidia,core-pwr-good-time = <4587 3876>;
+ nvidia,core-pwr-off-time = <39065>;
+ nvidia,core-power-req-active-high;
+ nvidia,sys-clock-req-active-high;
};
hda@...30000 {
--
2.7.4
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