linux-kernel - Re: [PATCH net-next v2 06/10] net: stmmac: Do not disable interrupts when cleaning TX

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Message-ID: <CAF=yD-+55uqYawF9oUFVT5T_cyxso4s5r+vxFrcxBTXuieNVRA@mail.gmail.com>
Date:   Mon, 1 Jul 2019 08:23:03 -0400
From:   Willem de Bruijn <willemdebruijn.kernel@...il.com>
To:     Jose Abreu <Jose.Abreu@...opsys.com>
Cc:     linux-kernel <linux-kernel@...r.kernel.org>,
        Network Development <netdev@...r.kernel.org>,
        Joao Pinto <Joao.Pinto@...opsys.com>,
        "David S . Miller" <davem@...emloft.net>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>
Subject: Re: [PATCH net-next v2 06/10] net: stmmac: Do not disable interrupts
 when cleaning TX

On Mon, Jul 1, 2019 at 6:15 AM Jose Abreu <Jose.Abreu@...opsys.com> wrote:
>
> From: Willem de Bruijn <willemdebruijn.kernel@...il.com>
>
> > By the
> >
> >         if ((status & handle_rx) && (chan < priv->plat->rx_queues_to_use)) {
> >                 stmmac_disable_dma_irq(priv, priv->ioaddr, chan);
> >                 napi_schedule_irqoff(&ch->rx_napi);
> >         }
> >
> > branch directly above? If so, is it possible to have fewer rx than tx
> > queues and miss this?
>
> Yes, it is possible.

And that is not a problem?

>
> > this logic seems more complex than needed?
> >
> >         if (status)
> >                 status |= handle_rx | handle_tx;
> >
> >         if ((status & handle_rx) && (chan < priv->plat->rx_queues_to_use)) {
> >
> >         }
> >
> >         if ((status & handle_tx) && (chan < priv->plat->tx_queues_to_use)) {
> >
> >         }
> >
> > status & handle_rx implies status & handle_tx and vice versa.
>
> This is removed in patch 09/10.
>
> > > -       if (work_done < budget && napi_complete_done(napi, work_done))
> > > -               stmmac_enable_dma_irq(priv, priv->ioaddr, chan);
> > > +       if (work_done < budget)
> > > +               napi_complete_done(napi, work_done);
> >
> > It does seem odd that stmmac_napi_poll_rx and stmmac_napi_poll_tx both
> > call stmmac_enable_dma_irq(..) independent of the other. Shouldn't the
> > IRQ remain masked while either is active or scheduled? That is almost
> > what this patch does, though not exactly.
>
> After patch 09/10 the interrupts will only be disabled by RX NAPI and
> re-enabled by it again. I can do some tests on whether disabling
> interrupts independently gives more performance but I wouldn't expect so
> because the real bottleneck when I do iperf3 tests is the RX path ...

Sharing the IRQ sounds fine. My only concern was TX-only IRQs in case
more TX than RX queues are configured. If that is possible with this
driver.