linux-kernel - [PATCH RFC 0/4] ARM Error Source Table Support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 2 Jul 2019 16:51:32 +0000
From:   Tyler Baicar OS <baicar@...amperecomputing.com>
To:     Open Source Submission <patches@...erecomputing.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
        "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
        "james.morse@....com" <james.morse@....com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will@...nel.org" <will@...nel.org>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "guohanjun@...wei.com" <guohanjun@...wei.com>,
        "sudeep.holla@....com" <sudeep.holla@....com>,
        "rjw@...ysocki.net" <rjw@...ysocki.net>,
        "lenb@...nel.org" <lenb@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "tony.luck@...el.com" <tony.luck@...el.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "Matteo.Carlini@....com" <Matteo.Carlini@....com>,
        "Andrew.Murray@....com" <Andrew.Murray@....com>
CC:     Tyler Baicar OS <baicar@...amperecomputing.com>
Subject: [PATCH RFC 0/4] ARM Error Source Table Support

This series adds support for the ARM Error Source Table (AEST) based on
the latest version of the AEST from ARM [0].

The AEST driver supports both memory mapped and system register interfaces.
This series assumes system register interfaces are only registered with
private peripheral interrupts (PPIs); otherwise there is no guarantee the
core handling the error is the core which took the error and has the
syndrome info in it's system registers.

SEAs and SEIs could also have syndrome information present in the RAS
extension system registers. That handling is tied into the system register
handling code.

This is meant to be initial support for AEST to address the current gaps
with systems that support ARMv8.2 RAS extensions but don't have
firmware-first support. This series simply logs all the errors it finds
and triggers a kernel panic if there is an UE present.

Future work:
- UER handling to avoid panic
- Looping through all external abort capable (ERR<n>FR.UE != 0) error
   nodes in SEA/SEI handling
- ARMv8.4 extension support

[0] https://static.docs.arm.com/den0085/a/DEN0085_RAS_ACPI_1.0_BETA_1.pdf

Tyler Baicar (4):
  ACPI/AEST: Initial AEST driver
  arm64: mm: Add RAS extension system register check to SEA handling
  arm64: traps: Add RAS extension system register check to serror
    handling
  trace, ras: add ARM RAS extension trace event

 arch/arm64/include/asm/ras.h |  41 +++++
 arch/arm64/kernel/Makefile   |   2 +-
 arch/arm64/kernel/ras.c      |  70 +++++++++
 arch/arm64/kernel/traps.c    |   3 +
 arch/arm64/mm/fault.c        |   3 +
 drivers/acpi/arm64/Kconfig   |   3 +
 drivers/acpi/arm64/Makefile  |   1 +
 drivers/acpi/arm64/aest.c    | 366 +++++++++++++++++++++++++++++++++++++++++++
 include/linux/acpi_aest.h    |  94 +++++++++++
 include/ras/ras_event.h      |  46 ++++++
 10 files changed, 628 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/include/asm/ras.h
 create mode 100644 arch/arm64/kernel/ras.c
 create mode 100644 drivers/acpi/arm64/aest.c
 create mode 100644 include/linux/acpi_aest.h

-- 
1.8.3.1