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Message-Id: <20190703190910.32633-12-helen.koike@collabora.com>
Date: Wed, 3 Jul 2019 16:09:07 -0300
From: Helen Koike <helen.koike@...labora.com>
To: linux-rockchip@...ts.infradead.org
Cc: devicetree@...r.kernel.org, eddie.cai.linux@...il.com,
mchehab@...nel.org, heiko@...ech.de, jacob2.chen@...k-chips.com,
jeffy.chen@...k-chips.com, zyc@...k-chips.com,
linux-kernel@...r.kernel.org, tfiga@...omium.org,
hans.verkuil@...co.com, laurent.pinchart@...asonboard.com,
sakari.ailus@...ux.intel.com, kernel@...labora.com,
ezequiel@...labora.com, linux-media@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, zhengsq@...k-chips.com,
Rob Herring <robh@...nel.org>,
Helen Koike <helen.koike@...labora.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Subject: [PATCH v7 11/14] dt-bindings: Document the Rockchip MIPI RX D-PHY bindings
From: Jacob Chen <jacob2.chen@...k-chips.com>
Add DT bindings documentation for Rockchip MIPI D-PHY RX
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
Reviewed-by: Rob Herring <robh@...nel.org>
[update for upstream]
Signed-off-by: Helen Koike <helen.koike@...labora.com>
---
Changes in v7:
- updated doc with new design and tested example
.../bindings/media/rockchip-mipi-dphy.txt | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
new file mode 100644
index 000000000000..2305d44d92db
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
@@ -0,0 +1,38 @@
+Rockchip SoC MIPI RX D-PHY
+-------------------------------------------------------------
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3288-mipi-dphy"
+ "rockchip,rk3399-mipi-dphy"
+- clocks : list of clock specifiers, corresponding to entries in
+ clock-names property;
+- clock-names: required clock name.
+- #phy-cells: Number of cells in a PHY specifier; Should be 0.
+
+MIPI RX D-PHY use registers in "general register files", it
+should be a child of the GRF.
+
+Optional properties:
+- reg: offset and length of the register set for the device.
+- rockchip,grf: MIPI TX1RX1 D-PHY not only has its own register but also
+ the GRF, so it is only necessary for MIPI TX1RX1 D-PHY.
+
+Device node example
+-------------------
+
+grf: syscon@...70000 {
+ compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
+
+...
+
+ dphy: mipi-dphy {
+ compatible = "rockchip,rk3399-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDPHY_REF>,
+ <&cru SCLK_DPHY_RX0_CFG>,
+ <&cru PCLK_VIO_GRF>;
+ clock-names = "dphy-ref", "dphy-cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+ #phy-cells = <0>;
+ };
+};
--
2.20.1
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