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Message-ID: <CAEnQRZDO4FzsC-MZGsxd=7dxSc0dRGcMjWW-W9T2TF7C1iD9NA@mail.gmail.com>
Date: Wed, 3 Jul 2019 09:27:56 +0300
From: Daniel Baluta <daniel.baluta@...il.com>
To: Andra Danciu <andradanciu1997@...il.com>
Cc: Shawn Guo <shawnguo@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Abel Vesa <abel.vesa@....com>,
Anson Huang <Anson.Huang@....com>, andrew.smirnov@...il.com,
"Angus Ainslie (Purism)" <angus@...ea.ca>,
Carlo Caione <ccaione@...libre.com>,
Guido Günther <agx@...xcpu.org>,
Devicetree List <devicetree@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] arm64: dts: imx8mq: Add sai3 and sai6 nodes
On Tue, Jul 2, 2019 at 4:25 PM Andra Danciu <andradanciu1997@...il.com> wrote:
>
> SAI3 and SAI6 nodes are used to connect to an external codec.
> They have 1 Tx and 1 Rx dataline.
>
> Cc: Daniel Baluta <daniel.baluta@....com>
> Signed-off-by: Andra Danciu <andradanciu1997@...il.com>
Reviewed-by: Daniel Baluta <daniel.baluta@....com>
> ---
> Changes since v2:
> - removed multiple new lines
>
> Changes since v1:
> - Added sai3 node because we need it to enable audio on pico-pi-8m
> - Added commit description
>
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index d09b808eff87..736cf81b695e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -278,6 +278,20 @@
> #size-cells = <1>;
> ranges = <0x30000000 0x30000000 0x400000>;
>
> + sai6: sai@...30000 {
> + compatible = "fsl,imx8mq-sai",
> + "fsl,imx6sx-sai";
> + reg = <0x30030000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
> + <&clk IMX8MQ_CLK_SAI6_ROOT>,
> + <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
> +
> gpio1: gpio@...00000 {
> compatible = "fsl,imx8mq-gpio", "fsl,imx35-gpio";
> reg = <0x30200000 0x10000>;
> @@ -728,6 +742,21 @@
> status = "disabled";
> };
>
> + sai3: sai@...c0000 {
> + compatible = "fsl,imx8mq-sai",
> + "fsl,imx6sx-sai";
> + reg = <0x308c0000 0x10000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
> + <&clk IMX8MQ_CLK_DUMMY>,
> + <&clk IMX8MQ_CLK_SAI3_ROOT>,
> + <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
> +
> i2c1: i2c@...20000 {
> compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c";
> reg = <0x30a20000 0x10000>;
> --
> 2.11.0
>
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