linux-kernel - Re: [PATCH 1/4] dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs

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Message-ID: <CAL_JsqK4t+M69CJ3Q+Sf9Q10jheDzHsMoNdjPCQ7x5rfGGq6Kw@mail.gmail.com>
Date:   Wed, 3 Jul 2019 07:30:00 -0600
From:   Rob Herring <robh+dt@...nel.org>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc:     linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
        John Crispin <john@...ozen.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Hauke Mehrtens <hauke@...ke-m.de>,
        Paul Burton <paul.burton@...s.com>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Mark Rutland <mark.rutland@....com>,
        Martin Schiller <ms@....tdt.de>
Subject: Re: [PATCH 1/4] dt-bindings: phy: add binding for the Lantiq VRX200
 and ARX300 PCIe PHYs

On Wed, Jul 3, 2019 at 2:58 AM Martin Blumenstingl
<martin.blumenstingl@...glemail.com> wrote:
>
> Hi Rob,
>
> On Wed, Jul 3, 2019 at 1:34 AM Rob Herring <robh+dt@...nel.org> wrote:
> >
> > On Tue, Jul 2, 2019 at 2:35 PM Martin Blumenstingl
> > <martin.blumenstingl@...glemail.com> wrote:
> > >
> > > Add the bindings for the PCIe PHY on Lantiq VRX200 and ARX300 SoCs.
> > > The IP block contains settings for the PHY and a PLL.
> > > The PLL mode is configurable through a dedicated #phy-cell in .dts.
> > >
> > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
> > > ---
> > >  .../bindings/phy/lantiq,vrx200-pcie-phy.yaml  | 87 +++++++++++++++++++
> > >  .../dt-bindings/phy/phy-lantiq-vrx200-pcie.h  | 11 +++
> > >  2 files changed, 98 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml
> > >  create mode 100644 include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h
> > >
> > > diff --git a/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml
> > > new file mode 100644
> > > index 000000000000..b7b222e772d0
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml
> > > @@ -0,0 +1,87 @@
> > > +# SPDX-License-Identifier: GPL-2.0
> >
> > The preference is (GPL-2.0 OR BSD-2-Clause) for new bindings.
> to make sure I understand this correctly:
> the license is then only valid for the bindings - is it fine if the
> driver uses GPL-2.0-only?

Yes, as this isn't derived from the driver code nor used by the driver
code (though that would be fine).

BTW, 'GPL-2.0-only' is the newer, preferred form of 'GPL-2.0', so I
guess we should be using (GPL-2.0-only OR BSD-2-Clause).

> I don't have any datasheet for these SoCs so all my knowledge is based
> on the GPL-2.0-only driver from the Lantiq board support package
> (called "UGW").
> the .yaml file is 100% my own work so I'm fine with having GPL-2.0 OR
> BSD-2-Clause
> however, that still has to be compatible with my driver, which I chose
> to be GPL-2.0-only because that's the license from the Lantiq board
> support package
>
>
> Martin