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Message-Id: <20190704091313.9516-5-Anson.Huang@nxp.com>
Date: Thu, 4 Jul 2019 17:13:13 +0800
From: Anson.Huang@....com
To: rui.zhang@...el.com, edubezval@...il.com,
daniel.lezcano@...aro.org, robh+dt@...nel.org,
mark.rutland@....com, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, catalin.marinas@....com,
will@...nel.org, leonard.crestez@....com, daniel.baluta@....com,
ping.bai@....com, olof@...om.net, maxime.ripard@...tlin.com,
jagan@...rulasolutions.com, bjorn.andersson@...aro.org,
dinguyen@...nel.org, enric.balletbo@...labora.com,
marcin.juszkiewicz@...aro.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Linux-imx@....com
Subject: [PATCH 4/4] arm64: dts: imx8mm: Add thermal zone support
From: Anson Huang <Anson.Huang@....com>
Add thermal zone and tmu node to support i.MX8MM thermal
driver, ONLY cpu thermal zone is supported, and cpu cooling
is also added.
Signed-off-by: Anson Huang <Anson.Huang@....com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 43 +++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 3a62407..1870c89 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -70,6 +70,7 @@
nvmem-cells = <&cpu_speed_grade>;
nvmem-cell-names = "speed_grade";
cpu-idle-states = <&cpu_sleep_wait>;
+ #cooling-cells = <2>;
};
A53_1: cpu@1 {
@@ -82,6 +83,7 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_sleep_wait>;
+ #cooling-cells = <2>;
};
A53_2: cpu@2 {
@@ -94,6 +96,7 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_sleep_wait>;
+ #cooling-cells = <2>;
};
A53_3: cpu@3 {
@@ -106,6 +109,7 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_sleep_wait>;
+ #cooling-cells = <2>;
};
A53_L2: l2-cache0 {
@@ -209,6 +213,38 @@
arm,no-tick-in-suspend;
};
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tmu>;
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit0: trip1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
@@ -368,6 +404,13 @@
gpio-ranges = <&iomuxc 0 119 30>;
};
+ tmu: tmu@...60000 {
+ compatible = "fsl,imx8mm-tmu";
+ reg = <0x30260000 0x10000>;
+ clocks = <&clk IMX8MM_CLK_TMU_ROOT>;
+ #thermal-sensor-cells = <0>;
+ };
+
wdog1: watchdog@...80000 {
compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt";
reg = <0x30280000 0x10000>;
--
2.7.4
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