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Date: Thu, 4 Jul 2019 15:43:14 +0000
From: Iuliana Prodan <iuliana.prodan@....com>
To: Andrey Smirnov <andrew.smirnov@...il.com>,
"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>
CC: Chris Spencer <christopher.spencer@....co.uk>,
Cory Tusar <cory.tusar@....aero>,
Chris Healy <cphealy@...il.com>,
Lucas Stach <l.stach@...gutronix.de>,
Horia Geanta <horia.geanta@....com>,
Aymen Sghaier <aymen.sghaier@....com>,
Leonard Crestez <leonard.crestez@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 02/16] crypto: caam - simplify clock initialization
On 7/3/2019 11:15 AM, Andrey Smirnov wrote:
> Simplify clock initialization code by converting it to use clk-bulk,
> devres and soc_device_match() match table. No functional change
> intended.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
> Cc: Chris Spencer <christopher.spencer@....co.uk>
> Cc: Cory Tusar <cory.tusar@....aero>
> Cc: Chris Healy <cphealy@...il.com>
> Cc: Lucas Stach <l.stach@...gutronix.de>
> Cc: Horia Geantă <horia.geanta@....com>
> Cc: Aymen Sghaier <aymen.sghaier@....com>
> Cc: Leonard Crestez <leonard.crestez@....com>
> Cc: linux-crypto@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> ---
> drivers/crypto/caam/ctrl.c | 203 +++++++++++++++++------------------
> drivers/crypto/caam/intern.h | 7 +-
> 2 files changed, 98 insertions(+), 112 deletions(-)
>
> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
> index e674d8770cdb..908d3ecf6d1c 100644
> --- a/drivers/crypto/caam/ctrl.c
> +++ b/drivers/crypto/caam/ctrl.c
> @@ -25,16 +25,6 @@ EXPORT_SYMBOL(caam_dpaa2);
> #include "qi.h"
> #endif
>
> -/*
> - * i.MX targets tend to have clock control subsystems that can
> - * enable/disable clocking to our device.
> - */
> -static inline struct clk *caam_drv_identify_clk(struct device *dev,
> - char *clk_name)
> -{
> - return caam_imx ? devm_clk_get(dev, clk_name) : NULL;
> -}
> -
> /*
> * Descriptor to instantiate RNG State Handle 0 in normal mode and
> * load the JDKEK, TDKEK and TDSK registers
> @@ -342,13 +332,6 @@ static int caam_remove(struct platform_device *pdev)
> /* Unmap controller region */
> iounmap(ctrl);
>
> - /* shut clocks off before finalizing shutdown */
> - clk_disable_unprepare(ctrlpriv->caam_ipg);
> - if (ctrlpriv->caam_mem)
> - clk_disable_unprepare(ctrlpriv->caam_mem);
> - clk_disable_unprepare(ctrlpriv->caam_aclk);
> - if (ctrlpriv->caam_emi_slow)
> - clk_disable_unprepare(ctrlpriv->caam_emi_slow);
> return 0;
> }
>
> @@ -497,20 +480,102 @@ static const struct of_device_id caam_match[] = {
> };
> MODULE_DEVICE_TABLE(of, caam_match);
>
> +struct caam_imx_data {
> + const struct clk_bulk_data *clks;
> + int num_clks;
> +};
> +
> +static const struct clk_bulk_data caam_imx6_clks[] = {
> + { .id = "ipg" },
> + { .id = "mem" },
> + { .id = "aclk" },
> + { .id = "emi_slow" },
> +};
> +
> +static const struct caam_imx_data caam_imx6_data = {
> + .clks = caam_imx6_clks,
> + .num_clks = ARRAY_SIZE(caam_imx6_clks),
> +};
> +
> +static const struct clk_bulk_data caam_imx7_clks[] = {
> + { .id = "ipg" },
> + { .id = "aclk" },
> +};
> +
> +static const struct caam_imx_data caam_imx7_data = {
> + .clks = caam_imx7_clks,
> + .num_clks = ARRAY_SIZE(caam_imx7_clks),
> +};
> +
> +static const struct clk_bulk_data caam_imx6ul_clks[] = {
> + { .id = "ipg" },
> + { .id = "mem" },
> + { .id = "aclk" },
> +};
> +
> +static const struct caam_imx_data caam_imx6ul_data = {
> + .clks = caam_imx6ul_clks,
> + .num_clks = ARRAY_SIZE(caam_imx6ul_clks),
> +};
> +
> +static const struct soc_device_attribute caam_imx_soc_table[] = {
> + { .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
> + { .soc_id = "i.MX6*", .data = &caam_imx6_data },
> + { .soc_id = "i.MX7*", .data = &caam_imx7_data },
> + { .family = "Freescale i.MX" },
> +};
You need to add a {/* sentinel */} in caam_imx_soc_table, otherwise will
crash for other than i.MX targets, when trying to identify the SoC.
> +
> +static void disable_clocks(void *data)
> +{
> + struct caam_drv_private *ctrlpriv = data;
> +
> + clk_bulk_disable_unprepare(ctrlpriv->num_clks, ctrlpriv->clks);
> +}
> +
> +static int init_clocks(struct device *dev,
> + struct caam_drv_private *ctrlpriv,
> + const struct caam_imx_data *data)
> +{
> + int ret;
> +
> + ctrlpriv->num_clks = data->num_clks;
> + ctrlpriv->clks = devm_kmemdup(dev, data->clks,
> + data->num_clks * sizeof(data->clks[0]),
> + GFP_KERNEL);
> + if (!ctrlpriv->clks)
> + return -ENOMEM;
> +
> + ret = devm_clk_bulk_get(dev, ctrlpriv->num_clks, ctrlpriv->clks);
> + if (ret) {
> + dev_err(dev,
> + "Failed to request all necessary clocks\n");
> + return ret;
> + }
> +
> + ret = clk_bulk_prepare_enable(ctrlpriv->num_clks, ctrlpriv->clks);
> + if (ret) {
> + dev_err(dev,
> + "Failed to prepare/enable all necessary clocks\n");
> + return ret;
> + }
> +
> + ret = devm_add_action_or_reset(dev, disable_clocks, ctrlpriv);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> /* Probe routine for CAAM top (controller) level */
> static int caam_probe(struct platform_device *pdev)
> {
> int ret, ring, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
> u64 caam_id;
> - static const struct soc_device_attribute imx_soc[] = {
> - {.family = "Freescale i.MX"},
> - {},
> - };
> + const struct soc_device_attribute *imx_soc_match;
> struct device *dev;
> struct device_node *nprop, *np;
> struct caam_ctrl __iomem *ctrl;
> struct caam_drv_private *ctrlpriv;
> - struct clk *clk;
> #ifdef CONFIG_DEBUG_FS
> struct caam_perfmon *perfmon;
> #endif
> @@ -527,91 +592,25 @@ static int caam_probe(struct platform_device *pdev)
> dev_set_drvdata(dev, ctrlpriv);
> nprop = pdev->dev.of_node;
>
> - caam_imx = (bool)soc_device_match(imx_soc);
> -
> - /* Enable clocking */
> - clk = caam_drv_identify_clk(&pdev->dev, "ipg");
> - if (IS_ERR(clk)) {
> - ret = PTR_ERR(clk);
> - dev_err(&pdev->dev,
> - "can't identify CAAM ipg clk: %d\n", ret);
> - return ret;
> - }
> - ctrlpriv->caam_ipg = clk;
> -
> - if (!of_machine_is_compatible("fsl,imx7d") &&
> - !of_machine_is_compatible("fsl,imx7s") &&
> - !of_machine_is_compatible("fsl,imx7ulp")) {
> - clk = caam_drv_identify_clk(&pdev->dev, "mem");
> - if (IS_ERR(clk)) {
> - ret = PTR_ERR(clk);
> - dev_err(&pdev->dev,
> - "can't identify CAAM mem clk: %d\n", ret);
> - return ret;
> + imx_soc_match = soc_device_match(caam_imx_soc_table);
> + if (imx_soc_match) {
> + if (!imx_soc_match->data) {
> + dev_err(dev, "No clock data provided for i.MX SoC");
> + return -EINVAL;
> }
> - ctrlpriv->caam_mem = clk;
> - }
>
> - clk = caam_drv_identify_clk(&pdev->dev, "aclk");
> - if (IS_ERR(clk)) {
> - ret = PTR_ERR(clk);
> - dev_err(&pdev->dev,
> - "can't identify CAAM aclk clk: %d\n", ret);
> - return ret;
> - }
> - ctrlpriv->caam_aclk = clk;
> -
> - if (!of_machine_is_compatible("fsl,imx6ul") &&
> - !of_machine_is_compatible("fsl,imx7d") &&
> - !of_machine_is_compatible("fsl,imx7s") &&
> - !of_machine_is_compatible("fsl,imx7ulp")) {
> - clk = caam_drv_identify_clk(&pdev->dev, "emi_slow");
> - if (IS_ERR(clk)) {
> - ret = PTR_ERR(clk);
> - dev_err(&pdev->dev,
> - "can't identify CAAM emi_slow clk: %d\n", ret);
> + ret = init_clocks(dev, ctrlpriv, imx_soc_match->data);
> + if (ret)
> return ret;
> - }
> - ctrlpriv->caam_emi_slow = clk;
> - }
> -
> - ret = clk_prepare_enable(ctrlpriv->caam_ipg);
> - if (ret < 0) {
> - dev_err(&pdev->dev, "can't enable CAAM ipg clock: %d\n", ret);
> - return ret;
> - }
> -
> - if (ctrlpriv->caam_mem) {
> - ret = clk_prepare_enable(ctrlpriv->caam_mem);
> - if (ret < 0) {
> - dev_err(&pdev->dev, "can't enable CAAM secure mem clock: %d\n",
> - ret);
> - goto disable_caam_ipg;
> - }
> - }
> -
> - ret = clk_prepare_enable(ctrlpriv->caam_aclk);
> - if (ret < 0) {
> - dev_err(&pdev->dev, "can't enable CAAM aclk clock: %d\n", ret);
> - goto disable_caam_mem;
> - }
> -
> - if (ctrlpriv->caam_emi_slow) {
> - ret = clk_prepare_enable(ctrlpriv->caam_emi_slow);
> - if (ret < 0) {
> - dev_err(&pdev->dev, "can't enable CAAM emi slow clock: %d\n",
> - ret);
> - goto disable_caam_aclk;
> - }
> }
> + caam_imx = (bool)imx_soc_match;
>
> /* Get configuration properties from device tree */
> /* First, get register page */
> ctrl = of_iomap(nprop, 0);
> if (ctrl == NULL) {
> dev_err(dev, "caam: of_iomap() failed\n");
> - ret = -ENOMEM;
> - goto disable_caam_emi_slow;
> + return -ENOMEM;
> }
>
> caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
> @@ -899,16 +898,6 @@ static int caam_probe(struct platform_device *pdev)
> #endif
> iounmap_ctrl:
> iounmap(ctrl);
> -disable_caam_emi_slow:
> - if (ctrlpriv->caam_emi_slow)
> - clk_disable_unprepare(ctrlpriv->caam_emi_slow);
> -disable_caam_aclk:
> - clk_disable_unprepare(ctrlpriv->caam_aclk);
> -disable_caam_mem:
> - if (ctrlpriv->caam_mem)
> - clk_disable_unprepare(ctrlpriv->caam_mem);
> -disable_caam_ipg:
> - clk_disable_unprepare(ctrlpriv->caam_ipg);
> return ret;
> }
>
> diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
> index ec25d260fa40..1f01703f510a 100644
> --- a/drivers/crypto/caam/intern.h
> +++ b/drivers/crypto/caam/intern.h
> @@ -94,11 +94,8 @@ struct caam_drv_private {
> Handles of the RNG4 block are initialized
> by this driver */
>
> - struct clk *caam_ipg;
> - struct clk *caam_mem;
> - struct clk *caam_aclk;
> - struct clk *caam_emi_slow;
> -
> + struct clk_bulk_data *clks;
> + int num_clks;
> /*
> * debugfs entries for developer view into driver/device
> * variables at runtime.
>
Iulia
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