lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 04 Jul 2019 18:22:12 +0200
From:   walter harms <wharms@....de>
To:     Colin King <colin.king@...onical.com>
CC:     Alex Deucher <alexander.deucher@....com>,
        Christian K├Ânig 
        <christian.koenig@....com>, David Zhou <David1.Zhou@....com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>, amd-gfx@...ts.freedesktop.org,
        dri-devel@...ts.freedesktop.org, kernel-janitors@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH][next] drm/amdgpu/psp: fix incorrect logic when checking
 asic_type



Am 04.07.2019 16:23, schrieb Colin King:
> From: Colin Ian King <colin.king@...onical.com>
> 
> Currently the check of the asic_type is always returning true because
> of the use of ||.  Fix this by using && instead.  Also break overly
> wide line.
> 
> Addresses-Coverity: ("Constant expression result")
> Fixes: dab70ff24db6 ("drm/amdgpu/psp: add psp support for navi14")
> Signed-off-by: Colin Ian King <colin.king@...onical.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index 527dc371598d..e4afd34e3034 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -540,7 +540,8 @@ psp_v11_0_sram_map(struct amdgpu_device *adev,
>  
>  	case AMDGPU_UCODE_ID_RLC_G:
>  		*sram_offset = 0x2000;
> -		if (adev->asic_type != CHIP_NAVI10 || adev->asic_type != CHIP_NAVI14) {
> +		if (adev->asic_type != CHIP_NAVI10 &&
> +		    adev->asic_type != CHIP_NAVI14) {
>  			*sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_ADDR);
>  			*sram_data_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_DATA);
>  		} else {
> @@ -551,7 +552,8 @@ psp_v11_0_sram_map(struct amdgpu_device *adev,
>  
>  	case AMDGPU_UCODE_ID_SDMA0:
>  		*sram_offset = 0x0;
> -		if (adev->asic_type != CHIP_NAVI10 || adev->asic_type != CHIP_NAVI14) {
> +		if (adev->asic_type != CHIP_NAVI10 &&
> +		    adev->asic_type != CHIP_NAVI14) {
>  			*sram_addr_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_ADDR);
>  			*sram_data_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_DATA);
>  		} else {


maybe it is better to use
		if (adev->asic_type == CHIP_NAVI10 ||
		    adev->asic_type == CHIP_NAVI14) {

i guess tha was intended here and it is more easy to read.
ppl are bad in non-non reading.

re,
 wh

Powered by blists - more mailing lists