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Message-Id: <20190705095656.19191-1-Zhiqiang.Hou@nxp.com>
Date: Fri, 5 Jul 2019 17:56:28 +0800
From: Hou Zhiqiang <Zhiqiang.Hou@....com>
To: linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
bhelgaas@...gle.com, robh+dt@...nel.org, mark.rutland@....com,
l.subrahmanya@...iveil.co.in, shawnguo@...nel.org,
leoyang.li@....com, lorenzo.pieralisi@....com,
catalin.marinas@....com, will.deacon@....com
Cc: Mingkai.Hu@....com, Minghuan.Lian@....com, Xiaowei.Bao@....com,
Hou Zhiqiang <Zhiqiang.Hou@....com>
Subject: [PATCHv6 00/28] PCI: mobiveil: fixes for Mobiveil PCIe Host Bridge IP driver
This patch set is to add fixes for Mobiveil PCIe Host driver.
Splited #2, #3, #9 and #10 of v5 patches.
Hou Zhiqiang (28):
PCI: mobiveil: Unify register accessors
PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSI
PCI: mobiveil: Fix PCI base address in MEM/IO outbound windows
PCI: mobiveil: Update the resource list traversal function
PCI: mobiveil: Use WIN_NUM_0 explicitly for CFG outbound window
PCI: mobiveil: Use the 1st inbound window for MEM inbound
transactions
PCI: mobiveil: Fix the Class Code field
PCI: mobiveil: Move the link up waiting out of mobiveil_host_init()
PCI: mobiveil: Move IRQ chained handler setup out of DT parse
PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers
PCI: mobiveil: Fix devfn check in mobiveil_pcie_valid_device()
dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional
PCI: mobiveil: Reformat the code for readability
PCI: mobiveil: Make the register updating more readable
PCI: mobiveil: Revise the MEM/IO outbound window initialization
PCI: mobiveil: Fix the returned error number
PCI: mobiveil: Remove an unnecessary return value check
PCI: mobiveil: Remove redundant var definitions and register read
operations
PCI: mobiveil: Fix the valid check for inbound and outbound window
PCI: mobiveil: Add the statistic of initialized inbound windows
PCI: mobiveil: Clear the target fields before updating the register
PCI: mobiveil: Mask out the lower 10-bit hardcode window size
PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound
window
PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound
window
PCI: mobiveil: Fix the CPU base address setup in inbound window
PCI: mobiveil: Move PCIe PIO enablement out of inbound window routine
PCI: mobiveil: Fix infinite-loop in the INTx process
PCI: mobiveil: Fix the potential INTx missing problem
.../devicetree/bindings/pci/mobiveil-pcie.txt | 2 +
drivers/pci/controller/pcie-mobiveil.c | 529 ++++++++++++--------
2 files changed, 318 insertions(+), 213 deletions(-)
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