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Message-Id: <20190705151440.20844-1-manivannan.sadhasivam@linaro.org>
Date: Fri, 5 Jul 2019 20:44:35 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: sboyd@...nel.org, mturquette@...libre.com, robh+dt@...nel.org
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
haitao.suo@...main.com, darren.tsao@...main.com,
fisher.cheng@...main.com, alec.lin@...main.com,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH 0/5] Add Bitmain BM1880 clock driver
Hello,
This patchset adds common clock driver for Bitmain BM1880 SoC clock
controller. The clock controller consists of gate, divider, mux
and pll clocks with different compositions. Hence, the driver uses
composite clock structure in place where multiple clocking units are
combined together.
This patchset also removes UART fixed clock and sources clocks from clock
controller for Sophon Edge board where the driver has been validated.
Thanks,
Mani
Manivannan Sadhasivam (5):
dt-bindings: clock: Add Bitmain BM1880 SoC clock controller binding
arm64: dts: bitmain: Add clock controller support for BM1880 SoC
arm64: dts: bitmain: Source common clock for UART controllers
clk: Add driver for Bitmain BM1880 SoC clock controller
MAINTAINERS: Add entry for Bitmain BM1880 SoC clock driver
.../bindings/clock/bitmain,bm1880-clk.txt | 47 +
MAINTAINERS | 2 +
.../boot/dts/bitmain/bm1880-sophon-edge.dts | 9 -
arch/arm64/boot/dts/bitmain/bm1880.dtsi | 27 +
drivers/clk/Kconfig | 6 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-bm1880.c | 947 ++++++++++++++++++
include/dt-bindings/clock/bm1880-clock.h | 82 ++
8 files changed, 1112 insertions(+), 9 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.txt
create mode 100644 drivers/clk/clk-bm1880.c
create mode 100644 include/dt-bindings/clock/bm1880-clock.h
--
2.17.1
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