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Message-Id: <45hnfp6SlLz9sP0@ozlabs.org>
Date: Mon, 8 Jul 2019 11:19:30 +1000 (AEST)
From: Michael Ellerman <patch-notifications@...erman.id.au>
To: Christophe Leroy <christophe.leroy@....fr>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Segher Boessenkool <segher@...nel.crashing.org>
Cc: linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] powerpc: slightly improve cache helpers
On Fri, 2019-05-10 at 09:24:48 UTC, Christophe Leroy wrote:
> Cache instructions (dcbz, dcbi, dcbf and dcbst) take two registers
> that are summed to obtain the target address. Using 'Z' constraint
> and '%y0' argument gives GCC the opportunity to use both registers
> instead of only one with the second being forced to 0.
>
> Suggested-by: Segher Boessenkool <segher@...nel.crashing.org>
> Signed-off-by: Christophe Leroy <christophe.leroy@....fr>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/6c5875843b87c3adea2beade9d1b8b3d4523900a
cheers
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