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Message-ID: <20190708071356.50928-1-yuehaibing@huawei.com>
Date:   Mon, 8 Jul 2019 15:13:56 +0800
From:   YueHaibing <yuehaibing@...wei.com>
To:     <mdf@...nel.org>, <stillcompiling@...il.com>, <atull@...nel.org>,
        <gregkh@...uxfoundation.org>
CC:     <linux-kernel@...r.kernel.org>, <linux-fpga@...r.kernel.org>,
        YueHaibing <yuehaibing@...wei.com>
Subject: [PATCH] fpga-manager: altera-ps-spi: Fix build error

If BITREVERSE is m and FPGA_MGR_ALTERA_PS_SPI is y,
build fails:

drivers/fpga/altera-ps-spi.o: In function `altera_ps_write':
altera-ps-spi.c:(.text+0x4ec): undefined reference to `byte_rev_table'

Select BITREVERSE to fix this.

Reported-by: Hulk Robot <hulkci@...wei.com>
Fixes: fcfe18f885f6 ("fpga-manager: altera-ps-spi: use bitrev8x4")
Signed-off-by: YueHaibing <yuehaibing@...wei.com>
---
 drivers/fpga/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 474f304..cdd4f73 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -40,6 +40,7 @@ config ALTERA_PR_IP_CORE_PLAT
 config FPGA_MGR_ALTERA_PS_SPI
 	tristate "Altera FPGA Passive Serial over SPI"
 	depends on SPI
+	select BITREVERSE
 	help
 	  FPGA manager driver support for Altera Arria/Cyclone/Stratix
 	  using the passive serial interface over SPI.
-- 
2.7.4


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