lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DB3PR0402MB39164E2F386181255ED37F45F5F60@DB3PR0402MB3916.eurprd04.prod.outlook.com>
Date:   Mon, 8 Jul 2019 08:54:19 +0000
From:   Anson Huang <anson.huang@....com>
To:     Viresh Kumar <viresh.kumar@...aro.org>
CC:     Leonard Crestez <leonard.crestez@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        Jacky Bai <ping.bai@....com>,
        Daniel Baluta <daniel.baluta@....com>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        Abel Vesa <abel.vesa@....com>,
        "andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
        "ccaione@...libre.com" <ccaione@...libre.com>,
        "angus@...ea.ca" <angus@...ea.ca>,
        "agx@...xcpu.org" <agx@...xcpu.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH 2/2] arm64: dts: imx8mm: Assign highest opp as suspend opp

Hi, Viresh

> On 08-07-19, 08:43, Anson Huang wrote:
> > Hi, Viresh
> >
> > > On 04-07-19, 07:49, Leonard Crestez wrote:
> > > > On 7/4/2019 9:23 AM, Anson.Huang@....com wrote:
> > > > > From: Anson Huang <Anson.Huang@....com>
> > > > >
> > > > > Assign highest OPP as suspend OPP to reduce suspend/resume
> > > > > latency on i.MX8MM.
> > > > >
> > > > > Signed-off-by: Anson Huang <Anson.Huang@....com>
> > > > > ---
> > > > >   arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 +
> > > > >   1 file changed, 1 insertion(+)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > > index b11fc5e..3a62407 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > > > @@ -136,6 +136,7 @@
> > > > >   			opp-microvolt = <1000000>;
> > > > >   			opp-supported-hw = <0x8>, <0x3>;
> > > > >   			clock-latency-ns = <150000>;
> > > > > +			opp-suspend;
> > > > >   		};
> > > > >   	};
> > > >
> > > > What if the highest OPP is unavailable due to speed grading?
> > >
> > > What does this exactly mean ? How is the OPP made unavailable in
> > > your case ?
> >
> > That is because in i.MX8M series SoCs, the speed grading and market
> > segment fuses settings could affect the OPP defined in DT, in a word,
> > all possible OPPs are defined in DT, but each parts could ONLY select
> > some of them to be working OPPs, so if the "opp-suspend" is added for
> > 1 OPP in DT, if the part's speed grading or market segment fuse settings
> make that OPP as unavailable,  then that "opp-suspend"
> > is NOT working at all.
> 
> How is this selection done ? You using some OPP helper or something else ?

Each OPP has "opp-supported-hw" property as below, the first value needs to be
checked with speed grading fuse, and the second one needs to be checked with
market segment fuse, ONLY both of them passed, then this OPP is supported. It
calls dev_pm_opp_set_supported_hw() to tell OPP framework to parse the OPP
table, this is my understanding.

opp-supported-hw = <0x8>, <0x3>;

thanks,
Anson

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ