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Message-ID: <20190709005809.GA28003@Asurada-Nvidia.nvidia.com>
Date: Mon, 8 Jul 2019 17:58:10 -0700
From: Nicolin Chen <nicoleotsuka@...il.com>
To: "S.j. Wang" <shengjiu.wang@....com>
Cc: "timur@...nel.org" <timur@...nel.org>,
"Xiubo.Lee@...il.com" <Xiubo.Lee@...il.com>,
"festevam@...il.com" <festevam@...il.com>,
"broonie@...nel.org" <broonie@...nel.org>,
"alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 2/2] ASoC: fsl_esai: recover the channel swap after
xrun
On Fri, Jul 05, 2019 at 07:03:47AM +0000, S.j. Wang wrote:
> >
> > > +
> > > + /* restore registers by regcache_sync */
> > > + fsl_esai_register_restore(esai_priv);
> > > +
> > > + regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,
> > > + ESAI_xCR_xPR_MASK, 0);
> > > + regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR,
> > > + ESAI_xCR_xPR_MASK, 0);
> >
> > And just for curious, can (or shall) we stuff this personal reset to the reset()
> > function? I found this one is a part of the reset routine being mentioned in
> > the RM -- it was done after ESAI reset is done via ECR register.
> >
>
> There is a problem to do this, TPR/RPR need to be clear after configure the control
> register. (TCCR, TCR). So it seems not only one place (reset function) need to be
> changed.
Do you know (or remember) why we suddenly involve this TPR/PRP?
The driver has no problem so far, even if we don't have them.
The "personal reset" sounds like a feature that we would use to
reset TX or RX individually, while this hw_reset() does a full
reset for both TX and RX. So I wonder whether they're necessary.
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