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Message-ID: <MN2PR12MB371095ABA70D43398ABF982CCBF10@MN2PR12MB3710.namprd12.prod.outlook.com>
Date:   Tue, 9 Jul 2019 10:33:18 +0000
From:   Luis de Oliveira <Luis.Oliveira@...opsys.com>
To:     Rob Herring <robh@...nel.org>,
        Luis Oliveira <Luis.Oliveira@...opsys.com>
CC:     "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "Joao.Pinto@...opsys.com" <Joao.Pinto@...opsys.com>,
        Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>
Subject: RE: [PATCH V2 2/2] dt-bindings: Document the DesignWare IP reset
 bindings

Hi Rob,

Thank you for the comments,

From: Rob Herring <robh@...nel.org>
Date: Tue, Jul 09, 2019 at 02:52:20

> On Thu, Jun 06, 2019 at 05:36:28PM +0200, Luis Oliveira wrote:
> > This adds documentation of device tree bindings for the
> > DesignWare IP reset controller.
> > 
> > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
> > Signed-off-by: Luis Oliveira <luis.oliveira@...opsys.com>
> > ---
> > Changelog
> > - Add active low configuration example
> > - Fix compatible string in the active high example
> > 
> >  .../devicetree/bindings/reset/snps,dw-reset.txt    | 30 ++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/reset/snps,dw-reset.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/reset/snps,dw-reset.txt b/Documentation/devicetree/bindings/reset/snps,dw-reset.txt
> > new file mode 100644
> > index 0000000..85f3301
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/reset/snps,dw-reset.txt
> > @@ -0,0 +1,30 @@
> > +Synopsys DesignWare Reset controller
> > +=======================================
> > +
> > +Please also refer to reset.txt in this directory for common reset
> > +controller binding usage.
> > +
> > +Required properties:
> > +
> > +- compatible: should be one of the following.
> > +	"snps,dw-high-reset" - for active high configuration
> > +	"snps,dw-low-reset" - for active low configuration
> 
> This is really a standalone block?
> 
> Are there versions of IP?
> 

We use this block because is is very simple. The Verilog is autogenerated 
after an simple input configuration (APB config, reset pin number, active 
high/low, etc) so it does not need versioning.
We use it in almost all our testchips and prototyping, and it is a 
standalone block.

> > +
> > +- reg: physical base address of the controller and length of memory mapped
> > +	region.
> > +
> > +- #reset-cells: must be 1.
> > +
> > +example:
> > +
> > +	dw_rst_1: reset-controller@...0 {
> > +		  compatible = "snps,dw-high-reset";
> > +	 	  reg = <0x0000 0x4>;
> > +		  #reset-cells = <1>;
> > +	};
> > +
> > +	dw_rst_2: reset-controller@...0 {i
> > +		  compatible = "snps,dw-low-reset";
> > +		  reg = <0x1000 0x8>;
> > +		  #reset-cells = <1>;
> > +	};
> > -- 
> > 2.7.4
> > 

Thank you Rob,

Luis

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