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Message-Id: <20190709182018.23193-2-gch981213@gmail.com>
Date: Wed, 10 Jul 2019 02:20:14 +0800
From: Chuanhong Guo <gch981213@...il.com>
To: linux-clk@...r.kernel.org (open list:COMMON CLK FRAMEWORK),
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS), linux-kernel@...r.kernel.org (open list),
linux-mips@...r.kernel.org (open list:MIPS),
devel@...verdev.osuosl.org (open list:STAGING SUBSYSTEM)
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paul.burton@...s.com>,
James Hogan <jhogan@...nel.org>,
John Crispin <john@...ozen.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Weijie Gao <hackpascal@...il.com>, NeilBrown <neil@...wn.name>,
Chuanhong Guo <gch981213@...il.com>,
Rob Herring <robh@...nel.org>
Subject: [PATCH 1/5] MIPS: ralink: add dt binding header for mt7621-pll
This patch adds dt binding header for mediatek,mt7621-pll
Signed-off-by: Weijie Gao <hackpascal@...il.com>
Signed-off-by: Chuanhong Guo <gch981213@...il.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
include/dt-bindings/clock/mt7621-clk.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 include/dt-bindings/clock/mt7621-clk.h
diff --git a/include/dt-bindings/clock/mt7621-clk.h b/include/dt-bindings/clock/mt7621-clk.h
new file mode 100644
index 000000000000..a29e14ee2efe
--- /dev/null
+++ b/include/dt-bindings/clock/mt7621-clk.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Weijie Gao <hackpascal@...il.com>
+ */
+
+#ifndef __DT_BINDINGS_MT7621_CLK_H
+#define __DT_BINDINGS_MT7621_CLK_H
+
+#define MT7621_CLK_CPU 0
+#define MT7621_CLK_BUS 1
+
+#define MT7621_CLK_MAX 2
+
+#endif /* __DT_BINDINGS_MT7621_CLK_H */
--
2.21.0
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