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Message-Id: <20190710063056.35689-4-Anson.Huang@nxp.com>
Date: Wed, 10 Jul 2019 14:30:55 +0800
From: Anson.Huang@....com
To: catalin.marinas@....com, will@...nel.org, robh+dt@...nel.org,
mark.rutland@....com, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
daniel.lezcano@...aro.org, tglx@...utronix.de,
leonard.crestez@....com, aisheng.dong@....com,
daniel.baluta@....com, ping.bai@....com, l.stach@...gutronix.de,
abel.vesa@....com, andrew.smirnov@...il.com, ccaione@...libre.com,
angus@...ea.ca, agx@...xcpu.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Cc: Linux-imx@....com
Subject: [PATCH V5 4/5] arm64: dts: imx8mq: Add system counter node
From: Anson Huang <Anson.Huang@....com>
Add i.MX8MQ system counter node to enable timer-imx-sysctr
broadcast timer driver.
Signed-off-by: Anson Huang <Anson.Huang@....com>
---
Changes since V4:
- update the clock info using fixed clock node;
- correct the reg range;
- update the interrupt number as the system counter driver ONLY uses 1 irq now.
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a1bbd80..2991172 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -644,6 +644,14 @@
#pwm-cells = <2>;
status = "disabled";
};
+
+ system_counter: timer@...a0000 {
+ compatible = "nxp,sysctr-timer";
+ reg = <0x306a0000 0x20000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc_25m>;
+ clock-names = "per";
+ };
};
bus@...00000 { /* AIPS3 */
--
2.7.4
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