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Date:   Wed, 10 Jul 2019 22:00:59 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Kees Cook <keescook@...omium.org>
cc:     Xi Ruoyao <xry111@...gyan1223.wang>,
        Peter Zijlstra <peterz@...radead.org>,
        Jiri Kosina <jikos@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Ingo Molnar <mingo@...nel.org>,
        Linux List Kernel Mailing <linux-kernel@...r.kernel.org>,
        Borislav Petkov <bp@...en8.de>, Len Brown <lenb@...nel.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        Bob Moore <robert.moore@...el.com>,
        Erik Schmauss <erik.schmauss@...el.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Daniel Bristot de Oliveira <bristot@...hat.com>,
        Juergen Gross <jgross@...e.com>
Subject: Re: [PATCH] x86/asm: Move native_write_cr0/3() out of line

On Wed, 10 Jul 2019, Kees Cook wrote:

> On Wed, Jul 10, 2019 at 09:42:46PM +0200, Thomas Gleixner wrote:
> > The pinning of sensitive CR0 and CR4 bits caused a boot crash when loading
> > the kvm_intel module on a kernel compiled with CONFIG_PARAVIRT=n.
> > 
> > The reason is that the static key which controls the pinning is marked RO
> > after init. The kvm_intel module contains a CR4 write which requires to
> > update the static key entry list. That obviously does not work when the key
> > is in a RO section.
> > 
> > With CONFIG_PARAVIRT enabled this does not happen because the CR4 write
> > uses the paravirt indirection and the actual write function is built in.
> > 
> > As the key is intended to be immutable after init, move
> > native_write_cr0/3() out of line.
> > 
> > While at it consolidate the update of the cr4 shadow variable and store the
> > value right away when the pinning is initialized on a booting CPU. No point
> > in reading it back 20 instructions later. This allows to confine the static
> > key and the pinning variable to cpu/common and allows to mark them static.
> > 
> > Fixes: 8dbec27a242c ("x86/asm: Pin sensitive CR0 bits")
> > Fixes: 873d50d58f67 ("x86/asm: Pin sensitive CR4 bits")
> > Reported-by: Linus Torvalds <torvalds@...ux-foundation.org>
> > Reported-by: Xi Ruoyao <xry111@...gyan1223.wang>
> > Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> > Tested-by: Xi Ruoyao <xry111@...gyan1223.wang>
> 
> Thank you for tracking this down and solving it!
> 
> Nit: should be "cr0/4()" in Subject and in paragraph 4.

Yeah. My brain is not working today.

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