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Message-Id: <1562859668-14209-7-git-send-email-gokulsri@codeaurora.org>
Date:   Thu, 11 Jul 2019 21:11:02 +0530
From:   Gokul Sriram Palanisamy <gokulsri@...eaurora.org>
To:     agross@...nel.org, david.brown@...aro.org, robh+dt@...nel.org,
        mark.rutland@....com, mturquette@...libre.com, sboyd@...nel.org,
        jassisinghbrar@...il.com, ohad@...ery.com,
        bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-remoteproc@...r.kernel.org,
        sricharan@...eaurora.org, gokulsri@...eaurora.org
Subject: [PATCH 06/12] dt-bindings: clock: qcom: Add reset for WCSSAON

Add binding for WCSSAON reset required for Q6v5 reset on IPQ8074 SoC.

Signed-off-by: Gokul Sriram Palanisamy <gokulsri@...eaurora.org>
Signed-off-by: Sricharan R <sricharan@...eaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@...eaurora.org>
---
 include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/qcom,gcc-ipq8074.h b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
index 4de4811..04e1f57 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
@@ -362,5 +362,6 @@
 #define GCC_PCIE1_AXI_SLAVE_ARES		128
 #define GCC_PCIE1_AHB_ARES			129
 #define GCC_PCIE1_AXI_MASTER_STICKY_ARES	130
+#define GCC_WCSSAON_RESET			131
 
 #endif
-- 
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