linux-kernel - Re: [PATCH v5 7/7] ARM: dts: rockchip: Specify rk3288-veyron-minnie's display timings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <10427933.3dknIRnSiX@diego>
Date:   Thu, 11 Jul 2019 23:28:14 +0200
From:   Heiko Stübner <heiko@...ech.de>
To:     Douglas Anderson <dianders@...omium.org>
Cc:     Thierry Reding <thierry.reding@...il.com>,
        Sean Paul <seanpaul@...omium.org>,
        linux-rockchip@...ts.infradead.org,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        dri-devel@...ts.freedesktop.org,
        Boris Brezillon <boris.brezillon@...labora.com>,
        Ezequiel Garcia <ezequiel@...labora.com>,
        Enric Balletbò <enric.balletbo@...labora.com>,
        Rob Herring <robh+dt@...nel.org>, mka@...omium.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Mark Rutland <mark.rutland@....com>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v5 7/7] ARM: dts: rockchip: Specify rk3288-veyron-minnie's display timings

Am Montag, 1. April 2019, 19:17:24 CEST schrieb Douglas Anderson:
> Just like we did for rk3288-veyron-chromebook, we want to be able to
> use one of the fixed PLLs in the system to make the pixel clock for
> minnie.
> 
> Specifying these timings matches us with how the display is used on
> the downstream Chrome OS kernel.  See https://crrev.com/c/323211.
> 
> Unlike what we did for rk3288-veyron-chromebook, this CL actually
> changes the timings (though not the pixel clock) that is used when
> using the upstream kernel.  Booting up a minnie shows that it ended up
> with a 66.67 MHz pixel clock but it was still using the
> porches/blankings it would have wanted for a 72.5 MHz pixel clock.
> 
> NOTE: compared to the downstream kernel, this seems to cause a
> slightly different result reported in the 'modetest' command on a
> Chromebook.  The downstream kernel shows:
>   1280x800 60 1280 1298 1330 1351 800 804 822 830 66667
> 
> With this patch we have:
>   1280x800 59 1280 1298 1330 1351 800 804 822 830 66666
> 
> Specifically modetest was reporting 60 Hz on the downstream kernel but
> the upstream kernel does the math and comesup with 59 (because we
> actually achieve 59.45 Hz).  Also upstream doesn't round the Hz up
> when converting to kHz--it seems to truncate.
> 
> ALSO NOTE: when I look at the EDID from the datasheet, I see:
>   -hsync -vsync
> ...but it seems like we've never actually run with that so I've
> continued leaving that out.
> 
> Signed-off-by: Douglas Anderson <dianders@...omium.org>

applied for 5.4

Thanks
Heiko