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Message-Id: <20190715124417.4787-31-l.luba@partner.samsung.com>
Date:   Mon, 15 Jul 2019 14:43:57 +0200
From:   Lukasz Luba <l.luba@...tner.samsung.com>
To:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org
Cc:     mturquette@...libre.com, sboyd@...nel.org,
        b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org,
        mark.rutland@....com, robh+dt@...nel.org, cw00.choi@...sung.com,
        kyungmin.park@...sung.com, a.hajda@...sung.com,
        m.szyprowski@...sung.com, s.nawrocki@...sung.com,
        myungjoo.ham@...sung.com, Lukasz Luba <l.luba@...tner.samsung.com>
Subject: [PATCH v1 30/50] ARM: dts: exynos: add bus_isp266 into Exynos5800

The Exynos5420 SoC had one clock for two lines while Exynos5422/5800 have
dedicated clock tree for the ACLK266_ISP. The max frequency is 300MHz so
it shares the OPP table with bus_gen. The bus is added here and is enabled
in .dts file for proper board.

Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
---
 arch/arm/boot/dts/exynos5800.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
index 57d3b319fd65..3b9200db43b6 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -131,3 +131,13 @@
 &mfc {
 	compatible = "samsung,mfc-v8";
 };
+
+&soc {
+		bus_isp266: bus_isp266 {
+			compatible = "samsung,exynos-bus";
+			clocks = <&clock CLK_DOUT_ACLK266_ISP>;
+			clock-names = "bus";
+			operating-points-v2 = <&bus_gen_opp_table>;
+			status = "disabled";
+		};
+};
-- 
2.17.1

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