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Message-Id: <20190715124417.4787-8-l.luba@partner.samsung.com>
Date: Mon, 15 Jul 2019 14:43:34 +0200
From: Lukasz Luba <l.luba@...tner.samsung.com>
To: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org
Cc: mturquette@...libre.com, sboyd@...nel.org,
b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org,
mark.rutland@....com, robh+dt@...nel.org, cw00.choi@...sung.com,
kyungmin.park@...sung.com, a.hajda@...sung.com,
m.szyprowski@...sung.com, s.nawrocki@...sung.com,
myungjoo.ham@...sung.com, Lukasz Luba <l.luba@...tner.samsung.com>
Subject: [PATCH v1 07/50] clk: samsung: add IDs to ACLK266_G2D clocks in
Exynos5420
Add IDs to MUXes of ACLK266_G2D to manage them from DT.
Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
---
drivers/clk/samsung/clk-exynos5420.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 9b4a1d81f708..9d54856dbcda 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -478,7 +478,8 @@ static const struct samsung_mux_clock exynos5800_mux_clks[] __initconst = {
MUX(0, "mout_aclk400_disp1", mout_group7_5800_p, SRC_TOP2, 4, 3),
MUX(0, "mout_aclk333_g2d", mout_group5_5800_p, SRC_TOP2, 8, 2),
- MUX(0, "mout_aclk266_g2d", mout_group5_5800_p, SRC_TOP2, 12, 2),
+ MUX(CLK_MOUT_ACLK266_G2D, "mout_aclk266_g2d", mout_group5_5800_p,
+ SRC_TOP2, 12, 2),
MUX(0, "mout_aclk300_jpeg", mout_group5_5800_p, SRC_TOP2, 20, 2),
MUX(0, "mout_aclk300_disp1", mout_group5_5800_p, SRC_TOP2, 24, 2),
MUX(0, "mout_aclk300_gscl", mout_group5_5800_p, SRC_TOP2, 28, 2),
@@ -567,7 +568,8 @@ static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = {
MUX(0, "mout_aclk400_disp1", mout_group1_p, SRC_TOP2, 4, 2),
MUX(0, "mout_aclk333_g2d", mout_group1_p, SRC_TOP2, 8, 2),
- MUX(0, "mout_aclk266_g2d", mout_group1_p, SRC_TOP2, 12, 2),
+ MUX(CLK_MOUT_ACLK266_G2D, "mout_aclk266_g2d", mout_group1_p,
+ SRC_TOP2, 12, 2),
MUX(0, "mout_aclk300_jpeg", mout_group1_p, SRC_TOP2, 20, 2),
MUX(0, "mout_aclk300_disp1", mout_group1_p, SRC_TOP2, 24, 2),
MUX(0, "mout_aclk300_gscl", mout_group1_p, SRC_TOP2, 28, 2),
--
2.17.1
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