[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190717165602.GA4271@xps15>
Date: Wed, 17 Jul 2019 10:56:02 -0600
From: Mathieu Poirier <mathieu.poirier@...aro.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Leo Yan <leo.yan@...aro.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Mike Leach <mike.leach@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
devicetree@...r.kernel.org, David Brown <david.brown@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Rajendra Nayak <rnayak@...eaurora.org>,
Vivek Gautam <vivek.gautam@...eaurora.org>,
Sibi Sankar <sibis@...eaurora.org>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org,
Marc Gonzalez <marc.w.gonzalez@...e.fr>
Subject: Re: [PATCHv8 5/5] coresight: cpu-debug: Add support for Qualcomm Kryo
On Fri, Jul 12, 2019 at 07:46:27PM +0530, Sai Prakash Ranjan wrote:
> Add support for coresight CPU debug module on Qualcomm
> Kryo CPUs. This patch adds the UCI entries for Kryo CPUs
> found on MSM8996 which shares the same PIDs as ETMs.
>
> Without this, below error is observed on MSM8996:
>
> [ 5.429867] OF: graph: no port node found in /soc/debug@...0000
> [ 5.429938] coresight-etm4x: probe of 3810000.debug failed with error -22
> [ 5.435415] coresight-cpu-debug 3810000.debug: Coresight debug-CPU0 initialized
> [ 5.446474] OF: graph: no port node found in /soc/debug@...0000
> [ 5.448927] coresight-etm4x: probe of 3910000.debug failed with error -22
> [ 5.454681] coresight-cpu-debug 3910000.debug: Coresight debug-CPU1 initialized
> [ 5.487765] OF: graph: no port node found in /soc/debug@...0000
> [ 5.488007] coresight-etm4x: probe of 3a10000.debug failed with error -22
> [ 5.493024] coresight-cpu-debug 3a10000.debug: Coresight debug-CPU2 initialized
> [ 5.501802] OF: graph: no port node found in /soc/debug@...0000
> [ 5.512901] coresight-etm4x: probe of 3b10000.debug failed with error -22
> [ 5.513192] coresight-cpu-debug 3b10000.debug: Coresight debug-CPU3 initialized
>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
> ---
> .../hwtracing/coresight/coresight-cpu-debug.c | 33 +++++++++----------
> drivers/hwtracing/coresight/coresight-priv.h | 10 +++---
> 2 files changed, 21 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hwtracing/coresight/coresight-cpu-debug.c
> index 2463aa7ab4f6..96544b348c27 100644
> --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c
> +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c
> @@ -646,24 +646,23 @@ static int debug_remove(struct amba_device *adev)
> return 0;
> }
>
> +static const struct amba_cs_uci_id uci_id_debug[] = {
> + {
> + /* CPU Debug UCI data */
> + .devarch = 0x47706a15,
> + .devarch_mask = 0xfff0ffff,
> + .devtype = 0x00000015,
> + }
> +};
> +
> static const struct amba_id debug_ids[] = {
> - { /* Debug for Cortex-A53 */
> - .id = 0x000bbd03,
> - .mask = 0x000fffff,
> - },
> - { /* Debug for Cortex-A57 */
> - .id = 0x000bbd07,
> - .mask = 0x000fffff,
> - },
> - { /* Debug for Cortex-A72 */
> - .id = 0x000bbd08,
> - .mask = 0x000fffff,
> - },
> - { /* Debug for Cortex-A73 */
> - .id = 0x000bbd09,
> - .mask = 0x000fffff,
> - },
> - { 0, 0 },
> + CS_AMBA_ID(0x000bbd03), /* Cortex-A53 */
> + CS_AMBA_ID(0x000bbd07), /* Cortex-A57 */
> + CS_AMBA_ID(0x000bbd08), /* Cortex-A72 */
> + CS_AMBA_ID(0x000bbd09), /* Cortex-A73 */
> + CS_AMBA_UCI_ID(0x000f0205, uci_id_debug), /* Qualcomm Kryo */
> + CS_AMBA_UCI_ID(0x000f0211, uci_id_debug), /* Qualcomm Kryo */
> + {},
> };
>
> static struct amba_driver debug_driver = {
> diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
> index 7d401790dd7e..41ae5863104d 100644
> --- a/drivers/hwtracing/coresight/coresight-priv.h
> +++ b/drivers/hwtracing/coresight/coresight-priv.h
> @@ -185,11 +185,11 @@ static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
> }
>
> /* coresight AMBA ID, full UCI structure: id table entry. */
> -#define CS_AMBA_UCI_ID(pid, uci_ptr) \
> - { \
> - .id = pid, \
> - .mask = 0x000fffff, \
> - .data = uci_ptr \
> +#define CS_AMBA_UCI_ID(pid, uci_ptr) \
> + { \
> + .id = pid, \
> + .mask = 0x000fffff, \
> + .data = (void *)uci_ptr \
> }
I will pickup this patch - it will show up in my next tree when rc1 comes out.
Thanks,
Mathieu
>
> /* extract the data value from a UCI structure given amba_id pointer. */
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>
Powered by blists - more mailing lists