lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <419e1b16-683e-1b56-7334-50d87368c1b9@nvidia.com>
Date:   Thu, 18 Jul 2019 10:41:55 -0700
From:   Sowjanya Komatineni <skomatineni@...dia.com>
To:     Dmitry Osipenko <digetx@...il.com>, <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>
CC:     Peter De Schrijver <pdeschrijver@...dia.com>,
        Joseph Lo <josephl@...dia.com>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>, <tglx@...utronix.de>,
        <jason@...edaemon.net>, <marc.zyngier@....com>,
        <linus.walleij@...aro.org>, <stefan@...er.ch>,
        <mark.rutland@....com>, <pgaikwad@...dia.com>,
        <linux-clk@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
        <jckuo@...dia.com>, <talho@...dia.com>,
        <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <mperttunen@...dia.com>, <spatra@...dia.com>, <robh+dt@...nel.org>,
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH V5 11/18] clk: tegra210: Add support for Tegra210 clocks


On 7/18/19 10:22 AM, Sowjanya Komatineni wrote:
>
> On 7/18/19 9:34 AM, Dmitry Osipenko wrote:
>> 18.07.2019 4:15, Sowjanya Komatineni пишет:
>>
>> [snip]
>>
>>>>> Please try to fix all missing dependencies and orderings.
>>>> Peter,
>>>>
>>>> dfllCPU_OUT is the first one to go thru restore when
>>>> clk_restore_context traverses thru the list.
>>>>
>>>> dfllCPU_OUT has dependency on DFLL_ref and DFLL_SOC but this
>>>> dependency is unknown to clock-tree.
>>>>
>>>> We can add DFLL_REF and DFLL_SOC as parents to dfllCPU_OUT during
>>>> register so dfllCPU_OUT save/restore happens after their parents are
>>>> restored.
>>>>
>>>> But DFLL needs both of these to be restored before DFLLCPU_Out and as
>>>> DFLL_SOC restore always happens after the REF, thinking to add
>>>> DFLL_SOC as parent to dfllCPU_OUT so save/restore follows after their
>>>> dependencies.
>>>>
>>>> Please comment.
>>>>
>>> Did quick try and I see by adding dfll-soc as parent to dfllCPU_OUT, 
>>> its
>>> in proper order after all its dependencies.
>>>
>>> Can now add dfll save/restore to do dfll reinit during restore..
>>>
>> If dfllCPU_OUT can work properly with dfll-soc being disabled, then this
>> kind of dependency isn't very correct and just papers over the real
>> problem, which is that there should be a way for CCF to specify multiple
>> dependencies for the clock or the reverse ordering should be used for
>> the restoring.
>
> dfll will not work without dfll-soc enabled.
>
> CLDVFS control logic is split into 2 clock domains. dvfs_ref_clk and 
> dvfs_soc_clk.
>
> Majority of the control logic is clocked from dvfs_soc_clk for 
> interfacing control registers.
>
Note on reverse ordering for restore. Currently restore order goes thru 
clock list and for each root goes thru parent -> child restore.

this order is correct and also all clocks are parented properly so they 
follow proper order.

dfllCPU is the only one where current driver doesn't take care of 
dependency in dfll_soc which gets enabled only after dfll_ref.


Based on dfllCPU control logic module design, dfll_ref and dfll_soc 
should be enabled prior to dfll init/enable.

So parenting dfll_soc to dfllCPU keeps proper order.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ