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Message-ID: <AM0PR04MB4211DB3B62D728BA2C70DEA280C80@AM0PR04MB4211.eurprd04.prod.outlook.com>
Date:   Thu, 18 Jul 2019 03:03:53 +0000
From:   Aisheng Dong <aisheng.dong@....com>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
CC:     "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Darshak Patel <Darshak.patel@...fochips.com>,
        Kinjan Patel <Kinjan.patel@...fochips.com>,
        Prajose John <Prajose.john@...fochips.com>
Subject: RE: [PATCH 3/3] arm64: dts: freescale: Add support for i.MX8QXP AI_ML
 board

> > > +&adma_lpuart1 {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_lpuart1>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +/* Debug */
> > > +&adma_lpuart2 {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_lpuart2>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +/* PCI-E */
> >
> > A bit confusing for the comments...
> >
> 
> Hmm. How about, "PCI-E UART"?
> 

It seems to be related to your board. So up to you.
I'm fine with it.

Regards
Aisheng

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